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fix(cpus): workaround for Neoverse V2 erratum 2618597

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Neoverse V2 erratum 2618597 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
disable the use of the Full Retention power mode in the core (setting
WFI_RET_CTRL and WFE_RET_CTRL in IMP_CPUPWRCTLR_EL1 to 0b000).

SDEN can be found here:
https://developer.arm.com/documentation/SDEN-2332927/latest

Change-Id: I23a81275d1e40cae39e6897093d6cdd3e11c08ea
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
This commit is contained in:
Bipin Ravi 2023-10-17 19:42:15 -05:00
parent 912c4090ff
commit c0f8ce5379
5 changed files with 32 additions and 7 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -528,6 +528,10 @@ For Neoverse V2, the following errata build flags are defined :
CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is still CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is still
open. open.
- ``ERRATA_V2_2618597``: This applies errata 2618597 workaround to Neoverse-V2
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
r0p2.
- ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2 - ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
r0p2. r0p2.

4
include/lib/cpus/aarch64/neoverse_v2.h
View file

@ -22,6 +22,10 @@
******************************************************************************/ ******************************************************************************/
#define NEOVERSE_V2_CPUPWRCTLR_EL1 S3_0_C15_C2_7 #define NEOVERSE_V2_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) #define NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFI_RET_CTRL_SHIFT U(4)
#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFI_RET_CTRL_WIDTH U(3)
#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFE_RET_CTRL_SHIFT U(7)
#define NEOVERSE_V2_CPUPWRCTLR_EL1_WFE_RET_CTRL_WIDTH U(3)
/******************************************************************************* /*******************************************************************************
* CPU Extended Control register 2 specific definitions. * CPU Extended Control register 2 specific definitions.

12
lib/cpus/aarch64/neoverse_v2.S
View file

@ -29,6 +29,18 @@ workaround_reset_end neoverse_v2, ERRATUM(2331132)
check_erratum_ls neoverse_v2, ERRATUM(2331132), CPU_REV(0, 2) check_erratum_ls neoverse_v2, ERRATUM(2331132), CPU_REV(0, 2)
workaround_reset_start neoverse_v2, ERRATUM(2618597), ERRATA_V2_2618597
/* Disable retention control for WFI and WFE. */
mrs x0, NEOVERSE_V2_CPUPWRCTLR_EL1
bfi x0, xzr, #NEOVERSE_V2_CPUPWRCTLR_EL1_WFI_RET_CTRL_SHIFT, \
#NEOVERSE_V2_CPUPWRCTLR_EL1_WFI_RET_CTRL_WIDTH
bfi x0, xzr, #NEOVERSE_V2_CPUPWRCTLR_EL1_WFE_RET_CTRL_SHIFT, \
#NEOVERSE_V2_CPUPWRCTLR_EL1_WFE_RET_CTRL_WIDTH
msr NEOVERSE_V2_CPUPWRCTLR_EL1, x0
workaround_reset_end neoverse_v2, ERRATUM(2618597)
check_erratum_ls neoverse_v2, ERRATUM(2618597), CPU_REV(0, 1)
workaround_reset_start neoverse_v2, ERRATUM(2662553), ERRATA_V2_2662553 workaround_reset_start neoverse_v2, ERRATUM(2662553), ERRATA_V2_2662553
sysreg_bitfield_insert NEOVERSE_V2_CPUECTLR2_EL1, NEOVERSE_V2_CPUECTLR2_EL1_TXREQ_STATIC_FULL, \ sysreg_bitfield_insert NEOVERSE_V2_CPUECTLR2_EL1, NEOVERSE_V2_CPUECTLR2_EL1_TXREQ_STATIC_FULL, \
NEOVERSE_V2_CPUECTLR2_EL1_TXREQ_LSB, NEOVERSE_V2_CPUECTLR2_EL1_TXREQ_WIDTH NEOVERSE_V2_CPUECTLR2_EL1_TXREQ_LSB, NEOVERSE_V2_CPUECTLR2_EL1_TXREQ_WIDTH

4
lib/cpus/cpu-ops.mk
View file

@ -826,6 +826,10 @@ CPU_FLAG_LIST += ERRATA_A510_2684597
# to revisions r0p0, r0p1 and r0p2. It is still open. # to revisions r0p0, r0p1 and r0p2. It is still open.
CPU_FLAG_LIST += ERRATA_V2_2331132 CPU_FLAG_LIST += ERRATA_V2_2331132
# Flag to apply erratum 2618597 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2618597
# Flag to apply erratum 2662553 workaround during reset. This erratum applies # Flag to apply erratum 2662553 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2. # to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2662553 CPU_FLAG_LIST += ERRATA_V2_2662553

15
services/std_svc/errata_abi/errata_abi_main.c
View file

@ -413,14 +413,15 @@ struct em_cpu_list cpu_list[] = {
.cpu_partnumber = NEOVERSE_V2_MIDR, .cpu_partnumber = NEOVERSE_V2_MIDR,
.cpu_errata_list = { .cpu_errata_list = {
[0] = {2331132, 0x00, 0x02, ERRATA_V2_2331132}, [0] = {2331132, 0x00, 0x02, ERRATA_V2_2331132},
[1] = {2662553, 0x00, 0x01, ERRATA_V2_2662553}, [1] = {2618597, 0x00, 0x01, ERRATA_V2_2618597},
[2] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \ [2] = {2662553, 0x00, 0x01, ERRATA_V2_2662553},
[3] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \
ERRATA_NON_ARM_INTERCONNECT}, ERRATA_NON_ARM_INTERCONNECT},
[3] = {2719105, 0x00, 0x01, ERRATA_V2_2719105}, [4] = {2719105, 0x00, 0x01, ERRATA_V2_2719105},
[4] = {2743011, 0x00, 0x01, ERRATA_V2_2743011}, [5] = {2743011, 0x00, 0x01, ERRATA_V2_2743011},
[5] = {2779510, 0x00, 0x01, ERRATA_V2_2779510}, [6] = {2779510, 0x00, 0x01, ERRATA_V2_2779510},
[6] = {2801372, 0x00, 0x01, ERRATA_V2_2801372}, [7] = {2801372, 0x00, 0x01, ERRATA_V2_2801372},
[7 ... ERRATA_LIST_END] = UNDEF_ERRATA, [8 ... ERRATA_LIST_END] = UNDEF_ERRATA,
} }
}, },
#endif /* NEOVERSE_V2_H_INC */ #endif /* NEOVERSE_V2_H_INC */