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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "lw/n1_errata_fixes" into integration
* changes: Removing redundant ISB instructions Workaround for Neoverse N1 erratum 1275112 Workaround for Neoverse N1 erratum 1262888 Workaround for Neoverse N1 erratum 1262606 Workaround for Neoverse N1 erratum 1257314 Workaround for Neoverse N1 erratum 1220197 Workaround for Neoverse N1 erratum 1207823 Workaround for Neoverse N1 erratum 1165347 Workaround for Neoverse N1 erratum 1130799 Workaround for Neoverse N1 erratum 1073348
This commit is contained in:
Sandrine Bailleux
TrustedFirmware Code Review
commit
bb2d778c74
4 changed files with 407 additions and 6 deletions
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@ -226,6 +226,35 @@ For Cortex-A76, the following errata build flags are defined :
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- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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For Neoverse N1, the following errata build flags are defined :
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- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU.
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- ``ERRATA_N1_1130799``: This applies errata 1130799 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
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- ``ERRATA_N1_1165347``: This applies errata 1165347 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
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- ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
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- ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
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- ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1275112``: This applies errata 1275112 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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@ -30,13 +30,29 @@
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******************************************************************************/
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#define NEOVERSE_N1_CPUECTLR_EL1 S3_0_C15_C1_4
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#define NEOVERSE_N1_WS_THR_L2_MASK (ULL(3) << 24)
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#define NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT (ULL(1) << 51)
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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******************************************************************************/
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#define NEOVERSE_N1_CPUACTLR_EL1 S3_0_C15_C1_0
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#define NEOVERSE_N1_CPUACTLR_EL1_BIT_6 (ULL(1) << 6)
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#define NEOVERSE_N1_CPUACTLR_EL1_BIT_13 (ULL(1) << 13)
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#define NEOVERSE_N1_CPUACTLR2_EL1 S3_0_C15_C1_1
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_0 (ULL(1) << 0)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_11 (ULL(1) << 11)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_15 (ULL(1) << 15)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_16 (ULL(1) << 16)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_59 (ULL(1) << 59)
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#define NEOVERSE_N1_CPUACTLR3_EL1 S3_0_C15_C1_2
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#define NEOVERSE_N1_CPUACTLR3_EL1_BIT_10 (ULL(1) << 10)
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/* Instruction patching registers */
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#define CPUPSELR_EL3 S3_6_C15_C8_0
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@ -43,7 +43,6 @@ func errata_n1_1043202_wa
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msr CPUPMR_EL3, x0
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ldr x0, =0x800200071
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msr CPUPCR_EL3, x0
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isb
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1:
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ret x17
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endfunc errata_n1_1043202_wa
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@ -69,12 +68,246 @@ func neoverse_n1_disable_speculative_loads
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/* Disable speculative loads */
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msr SSBS, xzr
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isb
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1:
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ret
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endfunc neoverse_n1_disable_speculative_loads
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1073348
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* This applies to revision r0p0 and r1p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1073348_wa
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/* Compare x0 against revision r1p0 */
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mov x17, x30
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bl check_errata_1073348
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_6
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msr NEOVERSE_N1_CPUACTLR_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1073348_wa
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func check_errata_1073348
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/* Applies to r0p0 and r1p0 */
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mov x1, #0x10
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b cpu_rev_var_ls
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endfunc check_errata_1073348
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1130799
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* This applies to revision <=r2p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1130799_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_1130799
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR2_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_59
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msr NEOVERSE_N1_CPUACTLR2_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1130799_wa
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func check_errata_1130799
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/* Applies to <=r2p0 */
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_1130799
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1165347
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* This applies to revision <=r2p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1165347_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_1165347
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR2_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_0
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_15
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msr NEOVERSE_N1_CPUACTLR2_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1165347_wa
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func check_errata_1165347
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/* Applies to <=r2p0 */
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_1165347
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1207823
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* This applies to revision <=r2p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1207823_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_1207823
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR2_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_11
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msr NEOVERSE_N1_CPUACTLR2_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1207823_wa
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func check_errata_1207823
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/* Applies to <=r2p0 */
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_1207823
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1220197
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* This applies to revision <=r2p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1220197_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_1220197
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUECTLR_EL1
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orr x1, x1, NEOVERSE_N1_WS_THR_L2_MASK
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msr NEOVERSE_N1_CPUECTLR_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1220197_wa
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func check_errata_1220197
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/* Applies to <=r2p0 */
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_1220197
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1257314
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* This applies to revision <=r3p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1257314_wa
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/* Compare x0 against revision r3p0 */
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mov x17, x30
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bl check_errata_1257314
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR3_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR3_EL1_BIT_10
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msr NEOVERSE_N1_CPUACTLR3_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1257314_wa
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func check_errata_1257314
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/* Applies to <=r3p0 */
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mov x1, #0x30
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b cpu_rev_var_ls
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endfunc check_errata_1257314
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1262606
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* This applies to revision <=r3p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1262606_wa
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/* Compare x0 against revision r3p0 */
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mov x17, x30
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bl check_errata_1262606
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
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msr NEOVERSE_N1_CPUACTLR_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1262606_wa
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func check_errata_1262606
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/* Applies to <=r3p0 */
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mov x1, #0x30
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b cpu_rev_var_ls
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endfunc check_errata_1262606
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1262888
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* This applies to revision <=r3p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1262888_wa
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/* Compare x0 against revision r3p0 */
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mov x17, x30
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bl check_errata_1262888
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUECTLR_EL1
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orr x1, x1, NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT
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msr NEOVERSE_N1_CPUECTLR_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1262888_wa
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func check_errata_1262888
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/* Applies to <=r3p0 */
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mov x1, #0x30
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b cpu_rev_var_ls
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endfunc check_errata_1262888
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1275112
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* This applies to revision <=r3p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1275112_wa
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/* Compare x0 against revision r3p0 */
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mov x17, x30
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bl check_errata_1275112
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
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msr NEOVERSE_N1_CPUACTLR_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1275112_wa
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func check_errata_1275112
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/* Applies to <=r3p0 */
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mov x1, #0x30
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b cpu_rev_var_ls
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endfunc check_errata_1275112
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Erratum 1315703.
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* This applies to revision <= r3p0 of Neoverse N1.
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@ -92,7 +325,6 @@ func errata_n1_1315703_wa
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mrs x0, NEOVERSE_N1_CPUACTLR2_EL1
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orr x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_16
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msr NEOVERSE_N1_CPUACTLR2_EL1, x0
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isb
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1:
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ret x17
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@ -123,6 +355,51 @@ func neoverse_n1_reset_func
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bl errata_n1_1043202_wa
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#endif
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#if ERRATA_N1_1073348
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mov x0, x18
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bl errata_n1_1073348_wa
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#endif
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#if ERRATA_N1_1130799
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mov x0, x18
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bl errata_n1_1130799_wa
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#endif
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#if ERRATA_N1_1165347
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mov x0, x18
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bl errata_n1_1165347_wa
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#endif
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#if ERRATA_N1_1207823
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mov x0, x18
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bl errata_n1_1207823_wa
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#endif
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#if ERRATA_N1_1220197
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mov x0, x18
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bl errata_n1_1220197_wa
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#endif
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#if ERRATA_N1_1257314
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mov x0, x18
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bl errata_n1_1257314_wa
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#endif
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#if ERRATA_N1_1262606
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mov x0, x18
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bl errata_n1_1262606_wa
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#endif
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#if ERRATA_N1_1262888
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mov x0, x18
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bl errata_n1_1262888_wa
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#endif
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#if ERRATA_N1_1275112
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mov x0, x18
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bl errata_n1_1275112_wa
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#endif
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#if ERRATA_N1_1315703
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mov x0, x18
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bl errata_n1_1315703_wa
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@ -133,24 +410,22 @@ func neoverse_n1_reset_func
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mrs x0, actlr_el3
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orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
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msr actlr_el3, x0
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isb
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/* Make sure accesses from EL0/EL1 are not trapped to EL2 */
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mrs x0, actlr_el2
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orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
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msr actlr_el2, x0
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isb
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/* Enable group0 counters */
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mov x0, #NEOVERSE_N1_AMU_GROUP0_MASK
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msr CPUAMCNTENSET_EL0, x0
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isb
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#endif
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#if ERRATA_DSU_936184
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bl errata_dsu_936184_wa
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#endif
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isb
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ret x19
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endfunc neoverse_n1_reset_func
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@ -185,6 +460,15 @@ func neoverse_n1_errata_report
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* checking functions of each errata.
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*/
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report_errata ERRATA_N1_1043202, neoverse_n1, 1043202
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report_errata ERRATA_N1_1073348, neoverse_n1, 1073348
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report_errata ERRATA_N1_1130799, neoverse_n1, 1130799
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report_errata ERRATA_N1_1165347, neoverse_n1, 1165347
|
||||
report_errata ERRATA_N1_1207823, neoverse_n1, 1207823
|
||||
report_errata ERRATA_N1_1220197, neoverse_n1, 1220197
|
||||
report_errata ERRATA_N1_1257314, neoverse_n1, 1257314
|
||||
report_errata ERRATA_N1_1262606, neoverse_n1, 1262606
|
||||
report_errata ERRATA_N1_1262888, neoverse_n1, 1262888
|
||||
report_errata ERRATA_N1_1275112, neoverse_n1, 1275112
|
||||
report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
|
||||
report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
|
||||
|
||||
|
|
|
|||
|
|
@ -238,6 +238,42 @@ ERRATA_A76_1286807 ?=0
|
|||
# only to r0p0 and r1p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1043202 ?=1
|
||||
|
||||
# Flag to apply erratum 1073348 workaround during reset. This erratum applies
|
||||
# only to revision r0p0 and r1p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1073348 ?=0
|
||||
|
||||
# Flag to apply erratum 1130799 workaround during reset. This erratum applies
|
||||
# only to revision <= r2p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1130799 ?=0
|
||||
|
||||
# Flag to apply erratum 1165347 workaround during reset. This erratum applies
|
||||
# only to revision <= r2p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1165347 ?=0
|
||||
|
||||
# Flag to apply erratum 1207823 workaround during reset. This erratum applies
|
||||
# only to revision <= r2p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1207823 ?=0
|
||||
|
||||
# Flag to apply erratum 1220197 workaround during reset. This erratum applies
|
||||
# only to revision <= r2p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1220197 ?=0
|
||||
|
||||
# Flag to apply erratum 1257314 workaround during reset. This erratum applies
|
||||
# only to revision <= r3p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1257314 ?=0
|
||||
|
||||
# Flag to apply erratum 1262606 workaround during reset. This erratum applies
|
||||
# only to revision <= r3p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1262606 ?=0
|
||||
|
||||
# Flag to apply erratum 1262888 workaround during reset. This erratum applies
|
||||
# only to revision <= r3p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1262888 ?=0
|
||||
|
||||
# Flag to apply erratum 1275112 workaround during reset. This erratum applies
|
||||
# only to revision <= r3p0 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1275112 ?=0
|
||||
|
||||
# Flag to apply erratum 1315703 workaround during reset. This erratum applies
|
||||
# to revisions before r3p1 of the Neoverse N1 cpu.
|
||||
ERRATA_N1_1315703 ?=1
|
||||
|
|
@ -431,6 +467,42 @@ $(eval $(call add_define,ERRATA_A76_1286807))
|
|||
$(eval $(call assert_boolean,ERRATA_N1_1043202))
|
||||
$(eval $(call add_define,ERRATA_N1_1043202))
|
||||
|
||||
# Process ERRATA_N1_1073348 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1073348))
|
||||
$(eval $(call add_define,ERRATA_N1_1073348))
|
||||
|
||||
# Process ERRATA_N1_1130799 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1130799))
|
||||
$(eval $(call add_define,ERRATA_N1_1130799))
|
||||
|
||||
# Process ERRATA_N1_1165347 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1165347))
|
||||
$(eval $(call add_define,ERRATA_N1_1165347))
|
||||
|
||||
# Process ERRATA_N1_1207823 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1207823))
|
||||
$(eval $(call add_define,ERRATA_N1_1207823))
|
||||
|
||||
# Process ERRATA_N1_1220197 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1220197))
|
||||
$(eval $(call add_define,ERRATA_N1_1220197))
|
||||
|
||||
# Process ERRATA_N1_1257314 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1257314))
|
||||
$(eval $(call add_define,ERRATA_N1_1257314))
|
||||
|
||||
# Process ERRATA_N1_1262606 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1262606))
|
||||
$(eval $(call add_define,ERRATA_N1_1262606))
|
||||
|
||||
# Process ERRATA_N1_1262888 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1262888))
|
||||
$(eval $(call add_define,ERRATA_N1_1262888))
|
||||
|
||||
# Process ERRATA_N1_1275112 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1275112))
|
||||
$(eval $(call add_define,ERRATA_N1_1275112))
|
||||
|
||||
# Process ERRATA_N1_1315703 flag
|
||||
$(eval $(call assert_boolean,ERRATA_N1_1315703))
|
||||
$(eval $(call add_define,ERRATA_N1_1315703))
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue