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fix(st-ddr): express memory size with size_t type

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Express memory size with size_t type in structures.
Retrieve value as uint32_t from device tree and then cast it to size_t.
Combined with uintptr_t use, it ensures a generic algorithm whatever
the platform architecture, notably within systematic tests. Adapt also
their prototypes.

Move memory size print outside stm32mp_ddr_check_size() to adapt it to
related platform.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ic6e1a62d7a5e23cef49909a658098c800e7dae3f
This commit is contained in:
Yann Gautier 2023-09-18 09:40:37 +02:00
parent cc933e1d12
commit b4e1e8fbf0
5 changed files with 47 additions and 52 deletions
Download patch file Download diff file Expand all files Collapse all files

54
drivers/st/ddr/stm32mp_ddr_test.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
* Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -18,19 +18,19 @@
* Note that the previous content is restored after test.
* Returns 0 if success, and address value else.
******************************************************************************/
uint32_t stm32mp_ddr_test_rw_access(void)
uintptr_t stm32mp_ddr_test_rw_access(void)
{
uint32_t saved_value = mmio_read_32(STM32MP_DDR_BASE);
mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
return (uint32_t)STM32MP_DDR_BASE;
return STM32MP_DDR_BASE;
}
mmio_write_32(STM32MP_DDR_BASE, saved_value);
return 0U;
return 0UL;
}
/*******************************************************************************
@ -41,7 +41,7 @@ uint32_t stm32mp_ddr_test_rw_access(void)
* File: memtest.c - This source code belongs to Public Domain.
* Returns 0 if success, and address value else.
******************************************************************************/
uint32_t stm32mp_ddr_test_data_bus(void)
uintptr_t stm32mp_ddr_test_data_bus(void)
{
uint32_t pattern;
@ -49,11 +49,11 @@ uint32_t stm32mp_ddr_test_data_bus(void)
mmio_write_32(STM32MP_DDR_BASE, pattern);
if (mmio_read_32(STM32MP_DDR_BASE) != pattern) {
return (uint32_t)STM32MP_DDR_BASE;
return STM32MP_DDR_BASE;
}
}
return 0;
return 0UL;
}
/*******************************************************************************
@ -65,38 +65,34 @@ uint32_t stm32mp_ddr_test_data_bus(void)
* size: size in bytes of the DDR memory device.
* Returns 0 if success, and address value else.
******************************************************************************/
uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
uintptr_t stm32mp_ddr_test_addr_bus(size_t size)
{
uint64_t addressmask = size - 1U;
uint64_t offset;
uint64_t testoffset = 0U;
size_t addressmask = size - 1U;
size_t offset;
size_t testoffset = 0U;
/* Write the default pattern at each of the power-of-two offsets. */
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1U) {
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)offset,
DDR_PATTERN);
mmio_write_32(STM32MP_DDR_BASE + offset, DDR_PATTERN);
}
/* Check for address bits stuck high. */
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_ANTIPATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1U) {
if (mmio_read_32(STM32MP_DDR_BASE + (uint32_t)offset) !=
DDR_PATTERN) {
return (uint32_t)(STM32MP_DDR_BASE + offset);
if (mmio_read_32(STM32MP_DDR_BASE + offset) != DDR_PATTERN) {
return STM32MP_DDR_BASE + offset;
}
}
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset, DDR_PATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
/* Check for address bits stuck low or shorted. */
for (testoffset = sizeof(uint32_t); (testoffset & addressmask) != 0U;
testoffset <<= 1U) {
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_ANTIPATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
return STM32MP_DDR_BASE;
@ -104,18 +100,16 @@ uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1) {
if ((mmio_read_32(STM32MP_DDR_BASE +
(uint32_t)offset) != DDR_PATTERN) &&
if ((mmio_read_32(STM32MP_DDR_BASE + offset) != DDR_PATTERN) &&
(offset != testoffset)) {
return (uint32_t)(STM32MP_DDR_BASE + offset);
return STM32MP_DDR_BASE + offset;
}
}
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_PATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
}
return 0U;
return 0UL;
}
/*******************************************************************************
@ -125,9 +119,9 @@ uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
* restore its content.
* Returns DDR computed size.
******************************************************************************/
uint32_t stm32mp_ddr_check_size(void)
size_t stm32mp_ddr_check_size(void)
{
uint32_t offset = sizeof(uint32_t);
size_t offset = sizeof(uint32_t);
mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
@ -142,7 +136,5 @@ uint32_t stm32mp_ddr_check_size(void)
offset <<= 1U;
}
INFO("Memory size = 0x%x (%u MB)\n", offset, offset / (1024U * 1024U));
return offset;
}