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Merge changes from topic "ns/spmc_at_el3" into integration

Browse source 
* changes:
  feat(rdn2): introduce platform handler for Group0 interrupt
  feat(rdn2): add plat hook for memory transaction
  feat(rdn2): introduce accessor function to obtain datastore
  feat(spm): separate StMM SP specifics to add support for a S-EL0 SP
  feat(rdn2): add defines needed for spmc-el3
  feat(ras): reuse SPM_MM specific defines for SPMC_AT_EL3
  feat(bl31): reuse SPM_MM specific defines for SPMC_AT_EL3
  feat(arm): reuse SPM_MM specific defines for SPMC_AT_EL3
  feat(el3-spmc): add a flag to enable support to load SEL0 SP
  refactor(spm-mm): reorganize secure partition manager shim code
This commit is contained in:
Manish V Badarkhe 2023-10-12 19:30:25 +02:00 • committed by TrustedFirmware Code Review
commit ad4e978774
20 changed files with 158 additions and 50 deletions
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8
Makefile
View file

@ -599,6 +599,12 @@ ifneq (${SPD},none)
ifneq ($(SP_LAYOUT_FILE),)
BL2_ENABLE_SP_LOAD := 1
endif
ifeq ($(SPMC_AT_EL3_SEL0_SP),1)
ifneq ($(SPMC_AT_EL3),1)
$(error SEL0 SP cannot be enabled without SPMC at EL3)
endif
endif
else
# All other SPDs in spd directory
SPD_DIR := spd
@ -1191,6 +1197,7 @@ $(eval $(call assert_booleans,\
SPIN_ON_BL1_EXIT \
SPM_MM \
SPMC_AT_EL3 \
SPMC_AT_EL3_SEL0_SP \
SPMD_SPM_AT_SEL2 \
ENABLE_SPMD_LP \
TRANSFER_LIST \
@ -1355,6 +1362,7 @@ $(eval $(call add_defines,\
SPIN_ON_BL1_EXIT \
SPM_MM \
SPMC_AT_EL3 \
SPMC_AT_EL3_SEL0_SP \
SPMD_SPM_AT_SEL2 \
TRANSFER_LIST \
TRUSTED_BOARD_BOOT \

4
bl31/bl31.ld.S
View file

@ -101,7 +101,7 @@ SECTIONS {
ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
"cpu_ops not defined for this platform.")
#if SPM_MM
#if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
# ifndef SPM_SHIM_EXCEPTIONS_VMA
# define SPM_SHIM_EXCEPTIONS_VMA RAM
# endif /* SPM_SHIM_EXCEPTIONS_VMA */
@ -128,7 +128,7 @@ SECTIONS {
PROVIDE(__SPM_SHIM_EXCEPTIONS_LMA__ = LOADADDR(.spm_shim_exceptions));
. = LOADADDR(.spm_shim_exceptions) + SIZEOF(.spm_shim_exceptions);
#endif /* SPM_MM */
#endif /* SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP) */
__RW_START__ = .;

18
docs/components/secure-partition-manager.rst
View file

@ -152,6 +152,8 @@ SPMC located at S-EL1, S-EL2 or EL3:
exception level is set to S-EL1.
``SPMD_SPM_AT_SEL2`` is enabled. The context save/restore routine
and exhaustive list of registers is visible at `[4]`_.
- **SPMC_AT_EL3_SEL0_SP**: this option enables the support to load SEL0 SP
when SPMC at EL3 support is enabled.
- **SP_LAYOUT_FILE**: this option specifies a text description file
providing paths to SP binary images and manifests in DTS format
(see `Describing secure partitions`_). It
@ -257,6 +259,22 @@ Sample TF-A build command line when the SPMC is located at EL3:
PLAT=fvp \
all fip
Sample TF-A build command line when the SPMC is located at EL3 and SEL0 SP is
enabled:
.. code:: shell
make \
CROSS_COMPILE=aarch64-none-elf- \
SPD=spmd \
SPMD_SPM_AT_SEL2=0 \
SPMC_AT_EL3=1 \
SPMC_AT_EL3_SEL0_SP=1 \
BL32=<path-to-tee-binary> \
BL33=<path-to-bl33-binary> \
PLAT=fvp \
all fip
FVP model invocation
====================

4
docs/getting_started/build-options.rst
View file

@ -900,6 +900,10 @@ Common build options
disabled). This configuration supports pre-Armv8.4 platforms (aka not
implementing the ``FEAT_SEL2`` extension). This is an experimental feature.
- ``SPMC_AT_EL3_SEL0_SP`` : Boolean option to enable SEL0 SP load support when
``SPMC_AT_EL3`` is enabled. The default value if ``0`` (disabled). This
option cannot be enabled (``1``) when (``SPMC_AT_EL3``) is disabled.
- ``SPMC_OPTEE`` : This boolean option is used jointly with the SPM
Dispatcher option (``SPD=spmd``) and with ``SPMD_SPM_AT_SEL2=0`` to
indicate that the SPMC at S-EL1 is OP-TEE and an OP-TEE specific loading

2
include/plat/arm/common/plat_arm.h
View file

@ -53,7 +53,7 @@ typedef struct arm_tzc_regions_info {
PLAT_ARM_TZC_NS_DEV_ACCESS}
#endif
#if SPM_MM
#if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
#define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END + ARM_L1_GPT_SIZE,\
TZC_REGION_S_RDWR, 0}, \

3
make_helpers/defaults.mk
View file

@ -240,6 +240,9 @@ SPM_MM := 0
# Use the FF-A SPMC implementation in EL3.
SPMC_AT_EL3 := 0
# Enable SEL0 SP when SPMC is enabled at EL3
SPMC_AT_EL3_SEL0_SP :=0
# Use SPM at S-EL2 as a default config for SPMD
SPMD_SPM_AT_SEL2 := 1

21
plat/arm/board/rdn2/include/platform_def.h
View file

@ -102,4 +102,25 @@
#define PLAT_REBOOT_PRI GIC_HIGHEST_SEC_PRIORITY
#define PLAT_EHF_DESC EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_REBOOT_PRI)
/*
* Number of Secure Partitions supported.
* SPMC at EL3, uses this count to configure the maximum number of supported
* secure partitions.
*/
#define SECURE_PARTITION_COUNT 1
/*
* Number of NWd Partitions supported.
* SPMC at EL3, uses this count to configure the maximum number of supported
* nwld partitions.
*/
#define NS_PARTITION_COUNT 1
/*
* Number of Logical Partitions supported.
* SPMC at EL3, uses this count to configure the maximum number of supported
* logical partitions.
*/
#define MAX_EL3_LP_DESCS_COUNT 1
#endif /* PLATFORM_DEF_H */

41
plat/arm/board/rdn2/rdn2_plat.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,6 +8,7 @@
#include <drivers/arm/gic600_multichip.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
#include <services/el3_spmc_ffa_memory.h>
#include <rdn2_ras.h>
#include <sgi_soc_platform_def_v2.h>
#include <sgi_plat.h>
@ -141,3 +142,41 @@ void bl31_platform_setup(void)
#endif
}
#endif /* IMAGE_BL31 */
#if SPMC_AT_EL3
#define DATASTORE_SIZE 1024
__section("arm_el3_tzc_dram") uint8_t plat_spmc_shmem_datastore[DATASTORE_SIZE];
int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size)
{
*datastore = plat_spmc_shmem_datastore;
*size = DATASTORE_SIZE;
return 0;
}
/*
* Add dummy implementations of memory management related platform hooks.
* Memory share/lend operation are not required on RdN2 platform.
*/
int plat_spmc_shmem_begin(struct ffa_mtd *desc)
{
return 0;
}
int plat_spmc_shmem_reclaim(struct ffa_mtd *desc)
{
return 0;
}
int plat_spmd_handle_group0_interrupt(uint32_t intid)
{
/*
* As of now, there are no sources of Group0 secure interrupt enabled
* for RDN2.
*/
(void)intid;
return -1;
}
#endif

8
plat/arm/css/sgi/include/sgi_base_platform_def.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -33,7 +33,7 @@
* chips are accessed - secure ram, css device and soc device regions.
*/
#if defined(IMAGE_BL31)
# if SPM_MM
# if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
# define PLAT_ARM_MMAP_ENTRIES (9 + ((CSS_SGI_CHIP_COUNT - 1) * 3))
# define MAX_XLAT_TABLES (7 + ((CSS_SGI_CHIP_COUNT - 1) * 3))
# define PLAT_SP_IMAGE_MMAP_REGIONS 10
@ -210,7 +210,7 @@
#define PLAT_SP_PRI 0x10
#endif
#if SPM_MM && RAS_FFH_SUPPORT
#if (SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)) && RAS_FFH_SUPPORT
/*
* CPER buffer memory of 128KB is reserved and it is placed adjacent to the
* memory shared between EL3 and S-EL0.
@ -232,7 +232,7 @@
#define PLAT_ARM_SP_IMAGE_STACK_BASE (PLAT_SP_IMAGE_NS_BUF_BASE + \
PLAT_SP_IMAGE_NS_BUF_SIZE + \
CSS_SGI_SP_CPER_BUF_SIZE)
#elif SPM_MM
#elif (SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP))
/*
* Secure partition stack follows right after the memory region that is shared
* between EL3 and S-EL0.

4
plat/arm/css/sgi/sgi_plat_v2.c
View file

@ -54,7 +54,7 @@ const mmap_region_t plat_arm_mmap[] = {
#if ARM_BL31_IN_DRAM
ARM_MAP_BL31_SEC_DRAM,
#endif
#if SPM_MM
#if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
ARM_SP_IMAGE_MMAP,
#endif
#if TRUSTED_BOARD_BOOT && !RESET_TO_BL2
@ -73,7 +73,7 @@ const mmap_region_t plat_arm_mmap[] = {
CSS_SGI_MAP_DEVICE,
SOC_PLATFORM_PERIPH_MAP_DEVICE,
SOC_SYSTEM_PERIPH_MAP_DEVICE,
#if SPM_MM
#if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
ARM_SPM_BUF_EL3_MMAP,
#endif
{0}

4
plat/common/aarch64/plat_ehf.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, Broadcom
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -25,7 +25,7 @@ ehf_pri_desc_t plat_exceptions[] = {
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
#endif
#if SPM_MM
#if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
#if RAS_FFH_SUPPORT
#if (PLAT_SP_PRI != PLAT_RAS_PRI)
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SP_PRI),

0
services/std_svc/spm/spm_mm/aarch64/spm_mm_shim_exceptions.S → services/std_svc/spm/common/aarch64/spm_shim_exceptions.S
View file

6
services/std_svc/spm/common/include/spm_common.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -32,11 +32,15 @@
#ifndef __ASSEMBLER__
#include <stdint.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
/* Assembly helpers */
uint64_t spm_secure_partition_enter(uint64_t *c_rt_ctx);
void __dead2 spm_secure_partition_exit(uint64_t c_rt_ctx, uint64_t ret);
/* Helper to obtain a reference to the SP's translation table context */
xlat_ctx_t *spm_get_sp_xlat_context(void);
#endif /* __ASSEMBLER__ */
#endif /* SPM_COMMON_H */

8
services/std_svc/spm/spm_mm/spm_mm_shim_private.h → services/std_svc/spm/common/include/spm_shim_private.h
View file

@ -1,11 +1,11 @@
/*
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPM_MM_SHIM_PRIVATE_H
#define SPM_MM_SHIM_PRIVATE_H
#ifndef SPM_SHIM_PRIVATE_H
#define SPM_SHIM_PRIVATE_H
#include <stdint.h>
@ -23,4 +23,4 @@ IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_END__, SPM_SHIM_EXCEPTIONS_END);
#define SPM_SHIM_EXCEPTIONS_SIZE \
(SPM_SHIM_EXCEPTIONS_END - SPM_SHIM_EXCEPTIONS_START)
#endif /* SPM_MM_SHIM_PRIVATE_H */
#endif /* SPM_SHIM_PRIVATE_H */

10
services/std_svc/spm/common/spm.mk
View file

@ -1,5 +1,5 @@
#
# Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2022-2023, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -11,7 +11,13 @@ endif
INCLUDES += -Iservices/std_svc/spm/common/include
SPM_SOURCES := $(addprefix services/std_svc/spm/common/, \
${ARCH}/spm_helpers.S)
${ARCH}/spm_helpers.S \
${ARCH}/spm_shim_exceptions.S)
ifeq (1, $(filter 1, ${SPM_MM} ${SPMC_AT_EL3_SEL0_SP}))
SPM_SOURCES += $(addprefix services/std_svc/spm/common/, \
spm_xlat_common.c)
endif
# Let the top-level Makefile know that we intend to include a BL32 image
NEED_BL32 := yes

30
services/std_svc/spm/common/spm_xlat_common.c Normal file
View file

@ -0,0 +1,30 @@
/*
* Copyright (c) 2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <platform_def.h>
/* Place translation tables by default along with the ones used by BL31. */
#ifndef PLAT_SP_IMAGE_XLAT_SECTION_NAME
#define PLAT_SP_IMAGE_XLAT_SECTION_NAME ".xlat_table"
#endif
#ifndef PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME
#define PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME ".bss"
#endif
/* Allocate and initialise the translation context for the secure partitions. */
REGISTER_XLAT_CONTEXT2(sp,
PLAT_SP_IMAGE_MMAP_REGIONS,
PLAT_SP_IMAGE_MAX_XLAT_TABLES,
PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE,
EL1_EL0_REGIME, PLAT_SP_IMAGE_XLAT_SECTION_NAME,
PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME);
/* Get handle of Secure Partition translation context */
xlat_ctx_t *spm_get_sp_xlat_context(void)
{
return &sp_xlat_ctx;
};

1
services/std_svc/spm/spm_mm/spm_mm.mk
View file

@ -21,7 +21,6 @@ ifeq (${CTX_INCLUDE_FPREGS},0)
endif
SPM_MM_SOURCES := $(addprefix services/std_svc/spm/spm_mm/, \
${ARCH}/spm_mm_shim_exceptions.S \
spm_mm_main.c \
spm_mm_setup.c \
spm_mm_xlat.c)

4
services/std_svc/spm/spm_mm/spm_mm_private.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -55,8 +55,6 @@ typedef struct sp_context {
void spm_sp_setup(sp_context_t *sp_ctx);
xlat_ctx_t *spm_get_sp_xlat_context(void);
int32_t spm_memory_attributes_get_smc_handler(sp_context_t *sp_ctx,
uintptr_t base_va);
int spm_memory_attributes_set_smc_handler(sp_context_t *sp_ctx,

4
services/std_svc/spm/spm_mm/spm_mm_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2021, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -21,7 +21,7 @@
#include "spm_common.h"
#include "spm_mm_private.h"
#include "spm_mm_shim_private.h"
#include "spm_shim_private.h"
/* Setup context of the Secure Partition */
void spm_sp_setup(sp_context_t *sp_ctx)

26
services/std_svc/spm/spm_mm/spm_mm_xlat.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -15,33 +15,11 @@
#include <services/spm_mm_svc.h>
#include "spm_mm_private.h"
#include "spm_mm_shim_private.h"
/* Place translation tables by default along with the ones used by BL31. */
#ifndef PLAT_SP_IMAGE_XLAT_SECTION_NAME
#define PLAT_SP_IMAGE_XLAT_SECTION_NAME ".xlat_table"
#endif
#ifndef PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME
#define PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME ".bss"
#endif
/* Allocate and initialise the translation context for the secure partitions. */
REGISTER_XLAT_CONTEXT2(sp,
PLAT_SP_IMAGE_MMAP_REGIONS,
PLAT_SP_IMAGE_MAX_XLAT_TABLES,
PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE,
EL1_EL0_REGIME, PLAT_SP_IMAGE_XLAT_SECTION_NAME,
PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME);
#include "spm_shim_private.h"
/* Lock used for SP_MEMORY_ATTRIBUTES_GET and SP_MEMORY_ATTRIBUTES_SET */
static spinlock_t mem_attr_smc_lock;
/* Get handle of Secure Partition translation context */
xlat_ctx_t *spm_get_sp_xlat_context(void)
{
return &sp_xlat_ctx;
};
/*
* Attributes are encoded using a different format in the SMC interface than in
* the Trusted Firmware, where the mmap_attr_t enum type is used. This function