Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-27 15:24:54 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge "fix(intel): bl31 overwrite OCRAM configuration" into integration

Browse source
This commit is contained in:
Sandrine Bailleux 2023-12-19 16:07:22 +01:00 • committed by TrustedFirmware Code Review
commit 92f8e8986f
4 changed files with 0 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
plat/intel/soc/agilex/bl31_plat_setup.c
View file

@ -136,8 +136,6 @@ void bl31_platform_setup(void)
(uint64_t)plat_secondary_cpus_bl31_entry); (uint64_t)plat_secondary_cpus_bl31_entry);
mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL);
ncore_enable_ocram_firewall();
} }
const mmap_region_t plat_agilex_mmap[] = { const mmap_region_t plat_agilex_mmap[] = {

4
plat/intel/soc/agilex5/bl31_plat_setup.c
View file

@ -167,10 +167,6 @@ void bl31_platform_setup(void)
gicv3_rdistif_init(plat_my_core_pos()); gicv3_rdistif_init(plat_my_core_pos());
gicv3_cpuif_enable(plat_my_core_pos()); gicv3_cpuif_enable(plat_my_core_pos());
mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL);
#if !defined(SIMICS_RUN)
ncore_enable_ocram_firewall();
#endif
} }
const mmap_region_t plat_agilex_mmap[] = { const mmap_region_t plat_agilex_mmap[] = {

2
plat/intel/soc/n5x/bl31_plat_setup.c
View file

@ -116,8 +116,6 @@ void bl31_platform_setup(void)
(uint64_t)plat_secondary_cpus_bl31_entry); (uint64_t)plat_secondary_cpus_bl31_entry);
mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL);
ncore_enable_ocram_firewall();
} }
const mmap_region_t plat_dm_mmap[] = { const mmap_region_t plat_dm_mmap[] = {

2
plat/intel/soc/stratix10/bl31_plat_setup.c
View file

@ -123,8 +123,6 @@ void bl31_platform_setup(void)
(uint64_t)plat_secondary_cpus_bl31_entry); (uint64_t)plat_secondary_cpus_bl31_entry);
mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); mailbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL);
enable_ocram_firewall();
} }
const mmap_region_t plat_stratix10_mmap[] = { const mmap_region_t plat_stratix10_mmap[] = {