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ti: k3: common: Only enable caches early

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We can enter and exit coherency without any software operations,
but HW_ASSISTED_COHERENCY has stronger implications that are
causing issues. Until these can be resolved, only use the weaker
WARMBOOT_ENABLE_DCACHE_EARLY flag.

Signed-off-by: Andrew F. Davis <afd@ti.com>
This commit is contained in:
Andrew F. Davis 2018-07-26 14:25:03 -05:00
parent 9262eb54db
commit 903f13d312
1 changed files with 1 additions and 1 deletions
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2
plat/ti/k3/common/plat_common.mk
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@ -12,7 +12,7 @@ COLD_BOOT_SINGLE_CPU := 1
PROGRAMMABLE_RESET_ADDRESS:= 1 PROGRAMMABLE_RESET_ADDRESS:= 1
# System coherency is managed in hardware # System coherency is managed in hardware
HW_ASSISTED_COHERENCY := 1 WARMBOOT_ENABLE_DCACHE_EARLY:= 1
USE_COHERENT_MEM := 0 USE_COHERENT_MEM := 0
ERROR_DEPRECATED := 1 ERROR_DEPRECATED := 1