Merge "fix(xilinx): remove clock_setrate and clock_getrate api" into integration

This commit is contained in:
Joanna Farley 2023-08-03 15:46:44 +02:00 committed by TrustedFirmware Code Review
commit 8bcc7532f5
4 changed files with 1 additions and 57 deletions

View file

@ -174,9 +174,7 @@ enum pm_api_id {
PM_CLOCK_GETSTATE,
PM_CLOCK_SETDIVIDER,
PM_CLOCK_GETDIVIDER,
PM_CLOCK_SETRATE,
PM_CLOCK_GETRATE,
PM_CLOCK_SETPARENT,
PM_CLOCK_SETPARENT = 43,
PM_CLOCK_GETPARENT,
PM_SECURE_IMAGE,
/* FPGA PL Readback */

View file

@ -1320,39 +1320,6 @@ enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
return status;
}
/**
* pm_clock_setrate - Set the clock rate for given id.
* @clock_id: Id of the clock.
* @rate: rate value in hz.
*
* This function is used by master to set rate for any clock.
*
* Return: Returns status, either success or error+reason.
*
*/
enum pm_ret_status pm_clock_setrate(uint32_t clock_id,
uint64_t rate)
{
return PM_RET_ERROR_NOTSUPPORTED;
}
/**
* pm_clock_getrate - Get the clock rate for given id.
* @clock_id: Id of the clock.
* @rate: rate value in hz.
*
* This function is used by master to get rate
* for any clock.
*
* Return: Returns status, either success or error+reason.
*
*/
enum pm_ret_status pm_clock_getrate(uint32_t clock_id,
uint64_t *rate)
{
return PM_RET_ERROR_NOTSUPPORTED;
}
/**
* pm_clock_setparent - Set the clock parent for given id.
* @clock_id: Id of the clock.

View file

@ -143,10 +143,6 @@ enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
uint32_t divider);
enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
uint32_t *divider);
enum pm_ret_status pm_clock_setrate(uint32_t clock_id,
uint64_t rate);
enum pm_ret_status pm_clock_getrate(uint32_t clock_id,
uint64_t *rate);
enum pm_ret_status pm_clock_setparent(uint32_t clock_id,
uint32_t parent_index);
enum pm_ret_status pm_clock_getparent(uint32_t clock_id,

View file

@ -435,23 +435,6 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
case PM_CLOCK_SETRATE:
ret = pm_clock_setrate(pm_arg[0],
((uint64_t)pm_arg[2]) << 32 | pm_arg[1]);
SMC_RET1(handle, (uint64_t)ret);
case PM_CLOCK_GETRATE:
{
uint64_t value = 0;
ret = pm_clock_getrate(pm_arg[0], &value);
SMC_RET2(handle, (uint64_t)ret |
(((uint64_t)value & 0xFFFFFFFFU) << 32U),
(value >> 32U) & 0xFFFFFFFFU);
}
case PM_CLOCK_SETPARENT:
ret = pm_clock_setparent(pm_arg[0], pm_arg[1]);
SMC_RET1(handle, (uint64_t)ret);