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fix(xilinx): remove clock_setrate and clock_getrate api
As per the current code base, PM_CLOCK_SETRATE and PM_CLOCK_GETRATE APIs are not supported for the runtime operations in the firmware and the TF-A it is already returning an error when there is any request to access these APIs. So, just removing the unused code to avoid the confusion around these APIs. Also, there is no issue with the backward compatibility as these APIs were never used since implemented. Hence no need to bump up the version of the feature check API as well. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Change-Id: I444f973e62cd25aae2e7f697d808210b265106ad
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5029574cd8
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4 changed files with 1 additions and 57 deletions
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@ -174,9 +174,7 @@ enum pm_api_id {
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PM_CLOCK_GETSTATE,
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PM_CLOCK_SETDIVIDER,
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PM_CLOCK_GETDIVIDER,
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PM_CLOCK_SETRATE,
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PM_CLOCK_GETRATE,
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PM_CLOCK_SETPARENT,
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PM_CLOCK_SETPARENT = 43,
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PM_CLOCK_GETPARENT,
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PM_SECURE_IMAGE,
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/* FPGA PL Readback */
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@ -1320,39 +1320,6 @@ enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
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return status;
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}
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/**
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* pm_clock_setrate - Set the clock rate for given id.
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* @clock_id: Id of the clock.
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* @rate: rate value in hz.
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*
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* This function is used by master to set rate for any clock.
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*
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* Return: Returns status, either success or error+reason.
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*
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*/
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enum pm_ret_status pm_clock_setrate(uint32_t clock_id,
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uint64_t rate)
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{
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return PM_RET_ERROR_NOTSUPPORTED;
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}
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/**
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* pm_clock_getrate - Get the clock rate for given id.
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* @clock_id: Id of the clock.
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* @rate: rate value in hz.
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*
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* This function is used by master to get rate
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* for any clock.
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*
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* Return: Returns status, either success or error+reason.
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*
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*/
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enum pm_ret_status pm_clock_getrate(uint32_t clock_id,
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uint64_t *rate)
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{
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return PM_RET_ERROR_NOTSUPPORTED;
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}
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/**
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* pm_clock_setparent - Set the clock parent for given id.
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* @clock_id: Id of the clock.
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@ -143,10 +143,6 @@ enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
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uint32_t divider);
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enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
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uint32_t *divider);
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enum pm_ret_status pm_clock_setrate(uint32_t clock_id,
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uint64_t rate);
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enum pm_ret_status pm_clock_getrate(uint32_t clock_id,
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uint64_t *rate);
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enum pm_ret_status pm_clock_setparent(uint32_t clock_id,
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uint32_t parent_index);
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enum pm_ret_status pm_clock_getparent(uint32_t clock_id,
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@ -435,23 +435,6 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
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SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
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}
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case PM_CLOCK_SETRATE:
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ret = pm_clock_setrate(pm_arg[0],
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((uint64_t)pm_arg[2]) << 32 | pm_arg[1]);
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SMC_RET1(handle, (uint64_t)ret);
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case PM_CLOCK_GETRATE:
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{
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uint64_t value = 0;
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ret = pm_clock_getrate(pm_arg[0], &value);
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SMC_RET2(handle, (uint64_t)ret |
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(((uint64_t)value & 0xFFFFFFFFU) << 32U),
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(value >> 32U) & 0xFFFFFFFFU);
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}
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case PM_CLOCK_SETPARENT:
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ret = pm_clock_setparent(pm_arg[0], pm_arg[1]);
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SMC_RET1(handle, (uint64_t)ret);
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