Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-27 23:35:10 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

feat(imx8ulp): allocated caam did for the non secure world

Browse source 
JR1, JR2 and JR3 are available for use by the non secure
world. Setup the A35 core DID for these job rings.

Signed-off-by: Varun Sethi <v.sethi@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: If64d4ce11ebff49a2405d8b561b344fcd7b2614f
This commit is contained in:
Pankaj Gupta 2021-08-04 15:42:51 +05:30 • committed by Jacky Bai
parent fcd41e8692
commit 7c5eedca4c
5 changed files with 46 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
plat/imx/imx8ulp/imx8ulp_bl31_setup.c
View file

@ -20,6 +20,7 @@
#include <platform_def.h>
#include <imx8_lpuart.h>
#include <imx8ulp_caam.h>
#include <imx_plat_common.h>
#include <plat_imx8.h>
#include <upower_api.h>
@ -112,6 +113,7 @@ void bl31_platform_setup(void)
imx8ulp_init_scmi_server();
upower_init();
imx8ulp_caam_init();
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)

18
plat/imx/imx8ulp/imx8ulp_caam.c Normal file
View file

@ -0,0 +1,18 @@
/*
* Copyright 2021-2024 NXP.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <lib/mmio.h>
#include <imx8ulp_caam.h>
void imx8ulp_caam_init(void)
{
/* config CAAM JRaMID set MID to Cortex A */
mmio_write_32(CAAM_JR0MID, CAAM_NS_MID);
mmio_write_32(CAAM_JR1MID, CAAM_NS_MID);
mmio_write_32(CAAM_JR2MID, CAAM_NS_MID);
mmio_write_32(CAAM_JR3MID, CAAM_NS_MID);
}

24
plat/imx/imx8ulp/include/imx8ulp_caam.h Normal file
View file

@ -0,0 +1,24 @@
/*
* Copyright 2021-2024 NXP.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef IMX8ULP_CAAM_H
#define IMX8ULP_CAAM_H
#include <lib/utils_def.h>
#include <platform_def.h>
#define CAAM_JR0MID (IMX_CAAM_BASE + 0x10)
#define CAAM_JR1MID (IMX_CAAM_BASE + 0x18)
#define CAAM_JR2MID (IMX_CAAM_BASE + 0x20)
#define CAAM_JR3MID (IMX_CAAM_BASE + 0x28)
#define CAAM_NS_MID (0x7)
#define JR0_BASE (IMX_CAAM_BASE + 0x1000)
void imx8ulp_caam_init(void);
#endif /* IMX8ULP_CAAM_H */

1
plat/imx/imx8ulp/include/platform_def.h
View file

@ -52,6 +52,7 @@
#define IMX_LPUART4_BASE U(0x29390000)
#define IMX_LPUART5_BASE U(0x293a0000)
#define IMX_LPUART_BASE IMX_LPUART5_BASE
#define IMX_CAAM_BASE U(0x292e0000)
#define IMX_BOOT_UART_CLK_IN_HZ 24000000
#define IMX_CONSOLE_BAUDRATE 115200

1
plat/imx/imx8ulp/platform.mk
View file

@ -31,6 +31,7 @@ BL31_SOURCES += plat/imx/common/lpuart_console.S \
lib/cpus/aarch64/cortex_a35.S \
drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \
plat/imx/imx8ulp/imx8ulp_caam.c \
drivers/scmi-msg/base.c \
drivers/scmi-msg/entry.c \
drivers/scmi-msg/smt.c \