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errata: workaround for Neoverse V1 errata 1925756

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Neoverse V1 erratum 1925756 is a Cat B erratum present in r0p0, r1p0,
and r1p1 of the V1 processor core, and it is still open.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I6500dc98da92a7c405b9ae09d794d666e8f4ae52
This commit is contained in:
laurenw-arm 2021-08-02 15:00:15 -05:00
parent 143b19651b
commit 741dd04c81
4 changed files with 46 additions and 0 deletions
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3
docs/design/cpu-specific-build-macros.rst
View file

@ -337,6 +337,9 @@ For Neoverse V1, the following errata build flags are defined :
CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
in r1p1.
- ``ERRATA_V1_1925756``: This applies errata 1925756 workaround to Neoverse-V1
CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1
CPU. This needs to be enabled only for revision r1p0 and r1p1 of the
CPU.

1
include/lib/cpus/aarch64/neoverse_v1.h
View file

@ -13,6 +13,7 @@
* CPU Extended Control register specific definitions.
******************************************************************************/
#define NEOVERSE_V1_CPUECTLR_EL1 S3_0_C15_C1_4
#define NEOVERSE_V1_CPUECTLR_EL1_BIT_8 (ULL(1) << 8)
#define NEOVERSE_V1_CPUECTLR_EL1_BIT_53 (ULL(1) << 53)
/*******************************************************************************

34
lib/cpus/aarch64/neoverse_v1.S
View file

@ -105,6 +105,34 @@ func check_errata_1852267
b cpu_rev_var_ls
endfunc check_errata_1852267
/* --------------------------------------------------
* Errata Workaround for Neoverse V1 Errata #1925756.
* This applies to revisions <= r1p1.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_neoverse_v1_1925756_wa
/* Check workaround compatibility. */
mov x17, x30
bl check_errata_1925756
cbz x0, 1f
/* Set bit 8 in CPUECTLR_EL1 */
mrs x1, NEOVERSE_V1_CPUECTLR_EL1
orr x1, x1, #NEOVERSE_V1_CPUECTLR_EL1_BIT_8
msr NEOVERSE_V1_CPUECTLR_EL1, x1
isb
1:
ret x17
endfunc errata_neoverse_v1_1925756_wa
func check_errata_1925756
/* Applies to <= r1p1. */
mov x1, #0x11
b cpu_rev_var_ls
endfunc check_errata_1925756
/* --------------------------------------------------
* Errata Workaround for Neoverse V1 Erratum #1940577
* This applies to revisions r1p0 - r1p1 and is open.
@ -193,6 +221,7 @@ func neoverse_v1_errata_report
report_errata ERRATA_V1_1774420, neoverse_v1, 1774420
report_errata ERRATA_V1_1791573, neoverse_v1, 1791573
report_errata ERRATA_V1_1852267, neoverse_v1, 1852267
report_errata ERRATA_V1_1925756, neoverse_v1, 1925756
report_errata ERRATA_V1_1940577, neoverse_v1, 1940577
ldp x8, x30, [sp], #16
@ -222,6 +251,11 @@ func neoverse_v1_reset_func
bl errata_neoverse_v1_1852267_wa
#endif
#if ERRATA_V1_1925756
mov x0, x18
bl errata_neoverse_v1_1925756_wa
#endif
#if ERRATA_V1_1940577
mov x0, x18
bl errata_neoverse_v1_1940577_wa

8
lib/cpus/cpu-ops.mk
View file

@ -384,6 +384,10 @@ ERRATA_V1_1791573 ?=0
# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
ERRATA_V1_1852267 ?=0
# Flag to apply erratum 1925756 workaround during reset. This needs to be
# enabled for r0p0, r1p0, and r1p1 of the Neoverse V1 core, it is still open.
ERRATA_V1_1925756 ?=0
# Flag to apply erratum 1940577 workaround during reset. This erratum applies
# to revisions r1p0 and r1p1 of the Neoverse V1 cpu.
ERRATA_V1_1940577 ?=0
@ -705,6 +709,10 @@ $(eval $(call add_define,ERRATA_V1_1791573))
$(eval $(call assert_boolean,ERRATA_V1_1852267))
$(eval $(call add_define,ERRATA_V1_1852267))
# Process ERRATA_V1_1925756 flag
$(eval $(call assert_boolean,ERRATA_V1_1925756))
$(eval $(call add_define,ERRATA_V1_1925756))
# Process ERRATA_V1_1940577 flag
$(eval $(call assert_boolean,ERRATA_V1_1940577))
$(eval $(call add_define,ERRATA_V1_1940577))