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Merge "plat: marvell: ap807: implement workaround for errata-id 3033912" into integration

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Manish Pandey 2020-09-22 10:55:51 +00:00 • committed by TrustedFirmware Code Review
commit 73740d98d9
4 changed files with 21 additions and 18 deletions
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17
drivers/marvell/ccu.c
View file

@ -30,6 +30,9 @@
((tgt) == DRAM_1_TID) || \ ((tgt) == DRAM_1_TID) || \
((tgt) == RAR_TID)) ? 1 : 0) ((tgt) == RAR_TID)) ? 1 : 0)
#define CCU_RGF(win) (MVEBU_CCU_BASE(MVEBU_AP0) + \
0x90 + 4 * (win))
/* For storage of CR, SCR, ALR, AHR abd GCR */ /* For storage of CR, SCR, ALR, AHR abd GCR */
static uint32_t ccu_regs_save[MVEBU_CCU_MAX_WINS * 4 + 1]; static uint32_t ccu_regs_save[MVEBU_CCU_MAX_WINS * 4 + 1];
@ -366,3 +369,17 @@ int init_ccu(int ap_index)
return 0; return 0;
} }
void errata_wa_init(void)
{
/*
* EERATA ID: RES-3033912 - Internal Address Space Init state causes
* a hang upon accesses to [0xf070_0000, 0xf07f_ffff]
* Workaround: Boot Firmware (ATF) should configure CCU_RGF_WIN(4) to
* split [0x6e_0000, 0xff_ffff] to values [0x6e_0000, 0x6f_ffff] and
* [0x80_0000, 0xff_ffff] that cause accesses to the
* segment of [0xf070_0000, 0xf07f_ffff] to act as RAZWI.
*/
mmio_write_32(CCU_RGF(4), 0x37f9b809);
mmio_write_32(CCU_RGF(5), 0x7ffa0009);
}

2
drivers/marvell/mochi/ap807_setup.c
View file

@ -117,6 +117,8 @@ static void init_aurora2(void)
reg |= (0x1 << CCU_SET_POC_OFFSET); reg |= (0x1 << CCU_SET_POC_OFFSET);
mmio_write_32(CCU_HTC_CR, reg); mmio_write_32(CCU_HTC_CR, reg);
#endif /* LLC_ENABLE */ #endif /* LLC_ENABLE */
errata_wa_init();
} }

19
drivers/marvell/mochi/apn806_setup.c
View file

@ -28,9 +28,6 @@
0x200) 0x200)
#define CCU_SET_POC_OFFSET 5 #define CCU_SET_POC_OFFSET 5
#define CCU_RGF(win) (MVEBU_CCU_BASE(MVEBU_AP0) + \
0x90 + 4 * (win))
#define DSS_CR0 (MVEBU_RFU_BASE + 0x100) #define DSS_CR0 (MVEBU_RFU_BASE + 0x100)
#define DVM_48BIT_VA_ENABLE (1 << 21) #define DVM_48BIT_VA_ENABLE (1 << 21)
@ -95,20 +92,6 @@ static void setup_smmu(void)
mmio_write_32(SMMU_sACR, reg); mmio_write_32(SMMU_sACR, reg);
} }
static void apn806_errata_wa_init(void)
{
/*
* ERRATA ID: RES-3033912 - Internal Address Space Init state causes
* a hang upon accesses to [0xf070_0000, 0xf07f_ffff]
* Workaround: Boot Firmware (ATF) should configure CCU_RGF_WIN(4) to
* split [0x6e_0000, 0xff_ffff] to values [0x6e_0000, 0x6f_ffff] and
* [0x80_0000, 0xff_ffff] that cause accesses to the
* segment of [0xf070_0000, 0xf07f_ffff] to act as RAZWI.
*/
mmio_write_32(CCU_RGF(4), 0x37f9b809);
mmio_write_32(CCU_RGF(5), 0x7ffa0009);
}
static void init_aurora2(void) static void init_aurora2(void)
{ {
uint32_t reg; uint32_t reg;
@ -131,7 +114,7 @@ static void init_aurora2(void)
mmio_write_32(CCU_HTC_CR, reg); mmio_write_32(CCU_HTC_CR, reg);
#endif /* LLC_ENABLE */ #endif /* LLC_ENABLE */
apn806_errata_wa_init(); errata_wa_init();
} }

1
include/drivers/marvell/ccu.h
View file

@ -47,6 +47,7 @@ void ccu_dram_target_set(int ap_index, uint32_t target);
void ccu_save_win_all(int ap_id); void ccu_save_win_all(int ap_id);
void ccu_restore_win_all(int ap_id); void ccu_restore_win_all(int ap_id);
int ccu_is_win_enabled(int ap_index, uint32_t win_id); int ccu_is_win_enabled(int ap_index, uint32_t win_id);
void errata_wa_init(void);
#endif #endif
#endif /* CCU_H */ #endif /* CCU_H */