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docs(ethos-n): update porting-guide.rst for NPU

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Add some missing configuration that must be done for supporting NPU on
other platforms.

Signed-off-by: Rob Hughes <robert.hughes@arm.com>
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: Ic505ea60f73b970d0d7ded101830eb2ce8c7ab64
This commit is contained in:
Rob Hughes 2023-02-20 12:03:52 +00:00 • committed by Joanna Farley
parent 986c4e991a
commit 6ce4c6c0bb
2 changed files with 25 additions and 5 deletions
docs
getting_started
porting-guide.rst
plat/arm
arm-build-options.rst

25
docs/getting_started/porting-guide.rst
View file

@ -574,8 +574,15 @@ optionally be defined:
PLAT_PARTITION_BLOCK_SIZE := 4096
$(eval $(call add_define,PLAT_PARTITION_BLOCK_SIZE))
If the platform port uses the Arm® Ethos™-N NPU driver, the following
configuration must be performed:
- The NPU SiP service handler must be hooked up. This consists of both the
initial setup (``ethosn_smc_setup``) and the handler itself
(``ethosn_smc_handler``)
If the platform port uses the Arm® Ethos™-N NPU driver with TZMP1 support
enabled, the following constants must also be defined.
enabled, the following constants and configuration must also be defined:
- **ARM_ETHOSN_NPU_PROT_FW_NSAID**
@ -604,7 +611,18 @@ enabled, the following constants must also be defined.
- **ARM_ETHOSN_NPU_FW_IMAGE_BASE** and **ARM_ETHOSN_NPU_FW_IMAGE_LIMIT**
- Provide FCONF entries to configure the image source for NPU firmware (and certificates).
Defines the physical address range that the NPU's firmware will be loaded
into and executed from.
- Configure the platforms TrustZone Controller (TZC) with appropriate regions
of protected memory. At minimum this must include a region for the NPU's
firmware code and a region for protected inference data, and these must be
accessible using the NSAIDs defined above.
- Include the NPU firmware and certificates in the FIP.
- Provide FCONF entries to configure the image source for the NPU firmware
and certificates.
- Add MMU mappings such that:
@ -612,7 +630,8 @@ enabled, the following constants must also be defined.
``ARM_ETHOSN_NPU_FW_IMAGE_BASE`` and ``ARM_ETHOSN_NPU_FW_IMAGE_LIMIT``
- BL31 (SiP service) can read the NPU firmware from the same region
- Add the firmware image ID ``ARM_ETHOSN_NPU_FW_IMAGE_ID`` to the list of images loaded by BL2
- Add the firmware image ID ``ARM_ETHOSN_NPU_FW_IMAGE_ID`` to the list of images
loaded by BL2.
Please see the reference implementation code for the Juno platform as an example.

5
docs/plat/arm/arm-build-options.rst
View file

@ -105,8 +105,9 @@ Arm Platform Build Options
Arm® Ethos™-N NPU. Requires ``ARM_ETHOSN_NPU_DRIVER`` and
``TRUSTED_BOARD_BOOT`` to be enabled.
- ``ARM_ETHOSN_NPU_FW``: location of the NPU firmware binary (ethosn.bin).
This firmware image will be included in the FIP and loaded at runtime.
- ``ARM_ETHOSN_NPU_FW``: location of the NPU firmware binary
(```ethosn.bin```). This firmware image will be included in the FIP and
loaded at runtime.
- ``ARM_SPMC_MANIFEST_DTS`` : path to an alternate manifest file used as the
SPMC Core manifest. Valid when ``SPD=spmd`` is selected.