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docs(ethos-n): update porting-guide.rst for NPU
Add some missing configuration that must be done for supporting NPU on other platforms. Signed-off-by: Rob Hughes <robert.hughes@arm.com> Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: Ic505ea60f73b970d0d7ded101830eb2ce8c7ab64
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2 changed files with 25 additions and 5 deletions
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@ -574,8 +574,15 @@ optionally be defined:
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PLAT_PARTITION_BLOCK_SIZE := 4096
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PLAT_PARTITION_BLOCK_SIZE := 4096
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$(eval $(call add_define,PLAT_PARTITION_BLOCK_SIZE))
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$(eval $(call add_define,PLAT_PARTITION_BLOCK_SIZE))
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If the platform port uses the Arm® Ethos™-N NPU driver, the following
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configuration must be performed:
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- The NPU SiP service handler must be hooked up. This consists of both the
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initial setup (``ethosn_smc_setup``) and the handler itself
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(``ethosn_smc_handler``)
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If the platform port uses the Arm® Ethos™-N NPU driver with TZMP1 support
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If the platform port uses the Arm® Ethos™-N NPU driver with TZMP1 support
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enabled, the following constants must also be defined.
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enabled, the following constants and configuration must also be defined:
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- **ARM_ETHOSN_NPU_PROT_FW_NSAID**
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- **ARM_ETHOSN_NPU_PROT_FW_NSAID**
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@ -604,7 +611,18 @@ enabled, the following constants must also be defined.
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- **ARM_ETHOSN_NPU_FW_IMAGE_BASE** and **ARM_ETHOSN_NPU_FW_IMAGE_LIMIT**
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- **ARM_ETHOSN_NPU_FW_IMAGE_BASE** and **ARM_ETHOSN_NPU_FW_IMAGE_LIMIT**
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- Provide FCONF entries to configure the image source for NPU firmware (and certificates).
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Defines the physical address range that the NPU's firmware will be loaded
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into and executed from.
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- Configure the platforms TrustZone Controller (TZC) with appropriate regions
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of protected memory. At minimum this must include a region for the NPU's
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firmware code and a region for protected inference data, and these must be
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accessible using the NSAIDs defined above.
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- Include the NPU firmware and certificates in the FIP.
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- Provide FCONF entries to configure the image source for the NPU firmware
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and certificates.
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- Add MMU mappings such that:
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- Add MMU mappings such that:
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@ -612,7 +630,8 @@ enabled, the following constants must also be defined.
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``ARM_ETHOSN_NPU_FW_IMAGE_BASE`` and ``ARM_ETHOSN_NPU_FW_IMAGE_LIMIT``
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``ARM_ETHOSN_NPU_FW_IMAGE_BASE`` and ``ARM_ETHOSN_NPU_FW_IMAGE_LIMIT``
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- BL31 (SiP service) can read the NPU firmware from the same region
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- BL31 (SiP service) can read the NPU firmware from the same region
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- Add the firmware image ID ``ARM_ETHOSN_NPU_FW_IMAGE_ID`` to the list of images loaded by BL2
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- Add the firmware image ID ``ARM_ETHOSN_NPU_FW_IMAGE_ID`` to the list of images
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loaded by BL2.
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Please see the reference implementation code for the Juno platform as an example.
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Please see the reference implementation code for the Juno platform as an example.
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@ -105,8 +105,9 @@ Arm Platform Build Options
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Arm® Ethos™-N NPU. Requires ``ARM_ETHOSN_NPU_DRIVER`` and
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Arm® Ethos™-N NPU. Requires ``ARM_ETHOSN_NPU_DRIVER`` and
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``TRUSTED_BOARD_BOOT`` to be enabled.
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``TRUSTED_BOARD_BOOT`` to be enabled.
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- ``ARM_ETHOSN_NPU_FW``: location of the NPU firmware binary (ethosn.bin).
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- ``ARM_ETHOSN_NPU_FW``: location of the NPU firmware binary
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This firmware image will be included in the FIP and loaded at runtime.
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(```ethosn.bin```). This firmware image will be included in the FIP and
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loaded at runtime.
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- ``ARM_SPMC_MANIFEST_DTS`` : path to an alternate manifest file used as the
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- ``ARM_SPMC_MANIFEST_DTS`` : path to an alternate manifest file used as the
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SPMC Core manifest. Valid when ``SPD=spmd`` is selected.
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SPMC Core manifest. Valid when ``SPD=spmd`` is selected.
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