mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 01:54:22 +00:00
Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements
Fix switch statements to comply with MISRA rules
This commit is contained in:
commit
6ab136c258
32 changed files with 103 additions and 87 deletions
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@ -87,6 +87,7 @@ register_t bl1_fwu_smc_handler(unsigned int smc_fid,
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case FWU_SMC_UPDATE_DONE:
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case FWU_SMC_UPDATE_DONE:
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bl1_fwu_done((void *)x1, NULL);
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bl1_fwu_done((void *)x1, NULL);
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/* We should never return from bl1_fwu_done() */
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/* We should never return from bl1_fwu_done() */
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break;
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default:
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default:
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assert(0);
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assert(0);
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@ -747,6 +748,7 @@ static int bl1_fwu_image_reset(unsigned int image_id, unsigned int flags)
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case IMAGE_STATE_EXECUTED:
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case IMAGE_STATE_EXECUTED:
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default:
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default:
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assert(0);
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assert(0);
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break;
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}
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}
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return 0;
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return 0;
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@ -83,22 +83,25 @@ static unsigned int read_cci_part_number(uintptr_t base)
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*/
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*/
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static int get_slave_ports(unsigned int part_num)
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static int get_slave_ports(unsigned int part_num)
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{
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{
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/* Macro to match CCI products */
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int num_slave_ports = -1;
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#define RET_ON_MATCH(product) \
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case CCI ## product ## _PART_NUM: \
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return CCI ## product ## _SLAVE_PORTS
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switch (part_num) {
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switch (part_num) {
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RET_ON_MATCH(400);
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case CCI400_PART_NUM:
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RET_ON_MATCH(500);
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num_slave_ports = CCI400_SLAVE_PORTS;
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RET_ON_MATCH(550);
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break;
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case CCI500_PART_NUM:
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num_slave_ports = CCI500_SLAVE_PORTS;
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break;
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case CCI550_PART_NUM:
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num_slave_ports = CCI550_SLAVE_PORTS;
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break;
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default:
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default:
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return -1;
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/* Do nothing in default case */
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break;
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}
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}
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#undef RET_ON_MATCH
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return num_slave_ports;
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}
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}
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#endif /* ENABLE_ASSERTIONS */
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#endif /* ENABLE_ASSERTIONS */
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@ -459,6 +459,7 @@ void gicv2_set_interrupt_type(unsigned int id, unsigned int type)
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break;
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break;
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default:
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default:
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assert(0);
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assert(0);
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break;
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}
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}
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spin_unlock(&gic_lock);
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spin_unlock(&gic_lock);
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}
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}
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@ -1004,6 +1004,7 @@ void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
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break;
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break;
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default:
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default:
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assert(0);
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assert(0);
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break;
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}
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}
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if (id < MIN_SPI_ID) {
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if (id < MIN_SPI_ID) {
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@ -321,6 +321,7 @@ static int dw_set_ios(int clk, int width)
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break;
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break;
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default:
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default:
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assert(0);
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assert(0);
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break;
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}
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}
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dw_set_clk(clk);
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dw_set_clk(clk);
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return 0;
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return 0;
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@ -271,6 +271,7 @@ static int ufs_prepare_cmd(utp_utrd_t *utrd, uint8_t op, uint8_t lun,
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break;
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break;
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default:
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default:
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assert(0);
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assert(0);
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break;
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}
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}
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if (hd->dd == DD_IN)
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if (hd->dd == DD_IN)
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flush_dcache_range(buf, length);
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flush_dcache_range(buf, length);
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@ -359,6 +360,7 @@ static int ufs_prepare_query(utp_utrd_t *utrd, uint8_t op, uint8_t idn,
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break;
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break;
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default:
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default:
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assert(0);
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assert(0);
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break;
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}
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}
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flush_dcache_range((uintptr_t)utrd, sizeof(utp_utrd_t));
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flush_dcache_range((uintptr_t)utrd, sizeof(utp_utrd_t));
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flush_dcache_range((uintptr_t)utrd->header, UFS_DESC_SIZE);
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flush_dcache_range((uintptr_t)utrd->header, UFS_DESC_SIZE);
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@ -511,6 +513,9 @@ static void ufs_query(uint8_t op, uint8_t idn, uint8_t index, uint8_t sel,
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case QUERY_WRITE_ATTR:
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case QUERY_WRITE_ATTR:
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assert(((buf & 3) == 0) && (size != 0));
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assert(((buf & 3) == 0) && (size != 0));
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break;
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break;
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default:
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/* Do nothing in default case */
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break;
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}
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}
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get_utrd(&utrd);
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get_utrd(&utrd);
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ufs_prepare_query(&utrd, op, idn, index, sel, buf, size);
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ufs_prepare_query(&utrd, op, idn, index, sel, buf, size);
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@ -533,6 +538,9 @@ static void ufs_query(uint8_t op, uint8_t idn, uint8_t index, uint8_t sel,
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(void *)(utrd.resp_upiu + sizeof(query_resp_upiu_t)),
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(void *)(utrd.resp_upiu + sizeof(query_resp_upiu_t)),
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size);
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size);
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break;
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break;
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default:
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/* Do nothing in default case */
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break;
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}
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}
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(void)result;
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(void)result;
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}
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}
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@ -37,8 +37,8 @@
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/*
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/*
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* Defines for PMF SMC function ids.
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* Defines for PMF SMC function ids.
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*/
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*/
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#define PMF_SMC_GET_TIMESTAMP_32 0x82000010
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#define PMF_SMC_GET_TIMESTAMP_32 0x82000010u
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#define PMF_SMC_GET_TIMESTAMP_64 0xC2000010
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#define PMF_SMC_GET_TIMESTAMP_64 0xC2000010u
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#define PMF_NUM_SMC_CALLS 2
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#define PMF_NUM_SMC_CALLS 2
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/*
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/*
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@ -30,8 +30,7 @@ uintptr_t pmf_smc_handler(unsigned int smc_fid,
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x2 = (uint32_t)x2;
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x2 = (uint32_t)x2;
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x3 = (uint32_t)x3;
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x3 = (uint32_t)x3;
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switch (smc_fid) {
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if (smc_fid == PMF_SMC_GET_TIMESTAMP_32) {
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case PMF_SMC_GET_TIMESTAMP_32:
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/*
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/*
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* Return error code and the captured
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* Return error code and the captured
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* time-stamp to the caller.
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* time-stamp to the caller.
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@ -41,13 +40,9 @@ uintptr_t pmf_smc_handler(unsigned int smc_fid,
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rc = pmf_get_timestamp_smc(x1, x2, x3, &ts_value);
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rc = pmf_get_timestamp_smc(x1, x2, x3, &ts_value);
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SMC_RET3(handle, rc, (uint32_t)ts_value,
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SMC_RET3(handle, rc, (uint32_t)ts_value,
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(uint32_t)(ts_value >> 32));
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(uint32_t)(ts_value >> 32));
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default:
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break;
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}
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}
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} else {
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} else {
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switch (smc_fid) {
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if (smc_fid == PMF_SMC_GET_TIMESTAMP_64) {
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case PMF_SMC_GET_TIMESTAMP_64:
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/*
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/*
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* Return error code and the captured
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* Return error code and the captured
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* time-stamp to the caller.
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* time-stamp to the caller.
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@ -56,9 +51,6 @@ uintptr_t pmf_smc_handler(unsigned int smc_fid,
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*/
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*/
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rc = pmf_get_timestamp_smc(x1, x2, x3, &ts_value);
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rc = pmf_get_timestamp_smc(x1, x2, x3, &ts_value);
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SMC_RET2(handle, rc, ts_value);
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SMC_RET2(handle, rc, ts_value);
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default:
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break;
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}
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}
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}
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}
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@ -414,10 +414,12 @@ u_register_t psci_smc_handler(uint32_t smc_fid,
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case PSCI_SYSTEM_OFF:
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case PSCI_SYSTEM_OFF:
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psci_system_off();
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psci_system_off();
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/* We should never return from psci_system_off() */
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/* We should never return from psci_system_off() */
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break;
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case PSCI_SYSTEM_RESET:
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case PSCI_SYSTEM_RESET:
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psci_system_reset();
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psci_system_reset();
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/* We should never return from psci_system_reset() */
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/* We should never return from psci_system_reset() */
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break;
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case PSCI_FEATURES:
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case PSCI_FEATURES:
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return psci_features(x1);
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return psci_features(x1);
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@ -324,13 +324,11 @@ static int fvp_node_hw_state(u_register_t target_cpu,
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if (psysr == PSYSR_INVALID)
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if (psysr == PSYSR_INVALID)
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return PSCI_E_INVALID_PARAMS;
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return PSCI_E_INVALID_PARAMS;
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switch (power_level) {
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if (power_level == ARM_PWR_LVL0) {
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case ARM_PWR_LVL0:
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ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF;
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ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF;
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break;
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} else {
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case ARM_PWR_LVL1:
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/* power_level == ARM_PWR_LVL1 */
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ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF;
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ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF;
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break;
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}
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}
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return ret;
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return ret;
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@ -305,6 +305,9 @@ int arm_bl2_handle_post_image_load(unsigned int image_id)
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}
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}
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break;
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break;
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#endif
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#endif
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default:
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/* Do nothing in default case */
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break;
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}
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}
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|
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return err;
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return err;
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|
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@ -190,6 +190,8 @@ void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority)
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|
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int plat_ic_has_interrupt_type(unsigned int type)
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int plat_ic_has_interrupt_type(unsigned int type)
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{
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{
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int has_interrupt_type = 0;
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|
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switch (type) {
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switch (type) {
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#if GICV2_G0_FOR_EL3
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#if GICV2_G0_FOR_EL3
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case INTR_TYPE_EL3:
|
case INTR_TYPE_EL3:
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@ -197,10 +199,14 @@ int plat_ic_has_interrupt_type(unsigned int type)
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case INTR_TYPE_S_EL1:
|
case INTR_TYPE_S_EL1:
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#endif
|
#endif
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case INTR_TYPE_NS:
|
case INTR_TYPE_NS:
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return 1;
|
has_interrupt_type = 1;
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|
break;
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default:
|
default:
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return 0;
|
/* Do nothing in default case */
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||||||
|
break;
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}
|
}
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|
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|
return has_interrupt_type;
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}
|
}
|
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|
|
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void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
|
void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
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@ -221,6 +227,7 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
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break;
|
break;
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default:
|
default:
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assert(0);
|
assert(0);
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||||||
|
break;
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||||||
}
|
}
|
||||||
|
|
||||||
gicv2_set_interrupt_type(id, gicv2_type);
|
gicv2_set_interrupt_type(id, gicv2_type);
|
||||||
|
@ -260,6 +267,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode,
|
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break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert(0);
|
assert(0);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
gicv2_set_spi_routing(id, proc_num);
|
gicv2_set_spi_routing(id, proc_num);
|
||||||
|
|
|
@ -158,15 +158,14 @@ uint32_t plat_interrupt_type_to_line(uint32_t type,
|
||||||
return __builtin_ctz(SCR_FIQ_BIT);
|
return __builtin_ctz(SCR_FIQ_BIT);
|
||||||
else
|
else
|
||||||
return __builtin_ctz(SCR_IRQ_BIT);
|
return __builtin_ctz(SCR_IRQ_BIT);
|
||||||
default:
|
|
||||||
assert(0);
|
|
||||||
/* Fall through in the release build */
|
|
||||||
case INTR_TYPE_EL3:
|
case INTR_TYPE_EL3:
|
||||||
/*
|
/*
|
||||||
* The EL3 interrupts are signaled as FIQ in both S-EL0/1 and
|
* The EL3 interrupts are signaled as FIQ in both S-EL0/1 and
|
||||||
* NS-EL0/1/2 contexts
|
* NS-EL0/1/2 contexts
|
||||||
*/
|
*/
|
||||||
return __builtin_ctz(SCR_FIQ_BIT);
|
return __builtin_ctz(SCR_FIQ_BIT);
|
||||||
|
default:
|
||||||
|
panic();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -248,6 +247,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode,
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert(0);
|
assert(0);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
gicv3_set_spi_routing(id, irm, mpidr);
|
gicv3_set_spi_routing(id, irm, mpidr);
|
||||||
|
|
|
@ -175,6 +175,9 @@ int hikey_bl2_handle_post_image_load(unsigned int image_id)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -267,6 +267,9 @@ int hikey960_bl2_handle_post_image_load(unsigned int image_id)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -193,6 +193,9 @@ int poplar_bl2_handle_post_image_load(unsigned int image_id)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -41,15 +41,8 @@ uint64_t oem_smc_handler(uint32_t smc_fid,
|
||||||
void *handle,
|
void *handle,
|
||||||
uint64_t flags)
|
uint64_t flags)
|
||||||
{
|
{
|
||||||
uint64_t rc;
|
WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
|
||||||
|
SMC_RET1(handle, SMC_UNK);
|
||||||
switch (smc_fid) {
|
|
||||||
default:
|
|
||||||
rc = SMC_UNK;
|
|
||||||
WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
|
|
||||||
}
|
|
||||||
|
|
||||||
SMC_RET1(handle, rc);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -71,6 +71,9 @@ uint64_t mediatek_sip_handler(uint32_t smc_fid,
|
||||||
boot_to_kernel(x1, x2, x3, x4);
|
boot_to_kernel(x1, x2, x3, x4);
|
||||||
SMC_RET0(handle);
|
SMC_RET0(handle);
|
||||||
#endif
|
#endif
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -287,6 +287,9 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
|
||||||
bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
|
bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
|
||||||
bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
|
bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -59,13 +59,11 @@ uint64_t sip_smc_handler(uint32_t smc_fid,
|
||||||
case SIP_SVC_UID:
|
case SIP_SVC_UID:
|
||||||
/* Return UID to the caller */
|
/* Return UID to the caller */
|
||||||
SMC_UUID_RET(handle, rk_sip_svc_uid);
|
SMC_UUID_RET(handle, rk_sip_svc_uid);
|
||||||
break;
|
|
||||||
|
|
||||||
case SIP_SVC_VERSION:
|
case SIP_SVC_VERSION:
|
||||||
/* Return the version of current implementation */
|
/* Return the version of current implementation */
|
||||||
SMC_RET2(handle, RK_SIP_SVC_VERSION_MAJOR,
|
SMC_RET2(handle, RK_SIP_SVC_VERSION_MAJOR,
|
||||||
RK_SIP_SVC_VERSION_MINOR);
|
RK_SIP_SVC_VERSION_MINOR);
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
default:
|
||||||
return rockchip_plat_sip_handler(smc_fid, x1, x2, x3, x4,
|
return rockchip_plat_sip_handler(smc_fid, x1, x2, x3, x4,
|
||||||
|
|
|
@ -19,9 +19,6 @@ uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
|
||||||
void *handle,
|
void *handle,
|
||||||
uint64_t flags)
|
uint64_t flags)
|
||||||
{
|
{
|
||||||
switch (smc_fid) {
|
ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
|
||||||
default:
|
SMC_RET1(handle, SMC_UNK);
|
||||||
ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
|
|
||||||
SMC_RET1(handle, SMC_UNK);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -207,6 +207,9 @@ static void sdram_timing_cfg_init(struct timing_related_config *ptiming_config,
|
||||||
ptiming_config->rdbi = 0;
|
ptiming_config->rdbi = 0;
|
||||||
ptiming_config->wdbi = 0;
|
ptiming_config->wdbi = 0;
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
ptiming_config->dramds = drv_config->dram_side_drv;
|
ptiming_config->dramds = drv_config->dram_side_drv;
|
||||||
ptiming_config->dramodt = drv_config->dram_side_dq_odt;
|
ptiming_config->dramodt = drv_config->dram_side_dq_odt;
|
||||||
|
|
|
@ -1314,5 +1314,8 @@ void dram_get_parameter(struct timing_related_config *timing_config,
|
||||||
case LPDDR4:
|
case LPDDR4:
|
||||||
lpddr4_get_parameter(timing_config, pdram_timing);
|
lpddr4_get_parameter(timing_config, pdram_timing);
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -310,6 +310,7 @@ static int pmu_set_power_domain(uint32_t pd_id, uint32_t pd_state)
|
||||||
pmu_bus_idle_req(BUS_ID_PERIHP, state);
|
pmu_bus_idle_req(BUS_ID_PERIHP, state);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -647,12 +648,8 @@ int rockchip_soc_cores_pwr_dm_off(void)
|
||||||
int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl,
|
int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl,
|
||||||
plat_local_state_t lvl_state)
|
plat_local_state_t lvl_state)
|
||||||
{
|
{
|
||||||
switch (lvl) {
|
if (lvl == MPIDR_AFFLVL1) {
|
||||||
case MPIDR_AFFLVL1:
|
|
||||||
clst_pwr_domain_suspend(lvl_state);
|
clst_pwr_domain_suspend(lvl_state);
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return PSCI_E_SUCCESS;
|
return PSCI_E_SUCCESS;
|
||||||
|
@ -675,12 +672,8 @@ int rockchip_soc_cores_pwr_dm_suspend(void)
|
||||||
|
|
||||||
int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, plat_local_state_t lvl_state)
|
int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, plat_local_state_t lvl_state)
|
||||||
{
|
{
|
||||||
switch (lvl) {
|
if (lvl == MPIDR_AFFLVL1) {
|
||||||
case MPIDR_AFFLVL1:
|
|
||||||
clst_pwr_domain_suspend(lvl_state);
|
clst_pwr_domain_suspend(lvl_state);
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return PSCI_E_SUCCESS;
|
return PSCI_E_SUCCESS;
|
||||||
|
@ -698,12 +691,8 @@ int rockchip_soc_cores_pwr_dm_on_finish(void)
|
||||||
int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl,
|
int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl,
|
||||||
plat_local_state_t lvl_state)
|
plat_local_state_t lvl_state)
|
||||||
{
|
{
|
||||||
switch (lvl) {
|
if (lvl == MPIDR_AFFLVL1) {
|
||||||
case MPIDR_AFFLVL1:
|
|
||||||
clst_pwr_domain_resume(lvl_state);
|
clst_pwr_domain_resume(lvl_state);
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return PSCI_E_SUCCESS;
|
return PSCI_E_SUCCESS;
|
||||||
|
@ -721,11 +710,8 @@ int rockchip_soc_cores_pwr_dm_resume(void)
|
||||||
|
|
||||||
int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, plat_local_state_t lvl_state)
|
int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, plat_local_state_t lvl_state)
|
||||||
{
|
{
|
||||||
switch (lvl) {
|
if (lvl == MPIDR_AFFLVL1) {
|
||||||
case MPIDR_AFFLVL1:
|
|
||||||
clst_pwr_domain_resume(lvl_state);
|
clst_pwr_domain_resume(lvl_state);
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return PSCI_E_SUCCESS;
|
return PSCI_E_SUCCESS;
|
||||||
|
|
|
@ -81,6 +81,9 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
|
||||||
bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry();
|
bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -85,6 +85,7 @@ void bl2_el3_plat_arch_setup(void)
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
plat_error_handler(-ENOTSUP);
|
plat_error_handler(-ENOTSUP);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!skip_scp) {
|
if (!skip_scp) {
|
||||||
|
|
|
@ -48,6 +48,9 @@ unsigned int zynqmp_get_uart_clk(void)
|
||||||
return 25000000;
|
return 25000000;
|
||||||
case ZYNQMP_CSU_VERSION_QEMU:
|
case ZYNQMP_CSU_VERSION_QEMU:
|
||||||
return 133000000;
|
return 133000000;
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return 100000000;
|
return 100000000;
|
||||||
|
@ -187,6 +190,9 @@ static void zynqmp_print_platform_name(void)
|
||||||
case ZYNQMP_CSU_VERSION_SILICON:
|
case ZYNQMP_CSU_VERSION_SILICON:
|
||||||
label = "silicon";
|
label = "silicon";
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
NOTICE("ATF running on XCZU%s/%s v%d/RTL%d.%d at 0x%x%s\n",
|
NOTICE("ATF running on XCZU%s/%s v%d/RTL%d.%d at 0x%x%s\n",
|
||||||
|
@ -258,6 +264,9 @@ unsigned int plat_get_syscnt_freq2(void)
|
||||||
return 4000000;
|
return 4000000;
|
||||||
case ZYNQMP_CSU_VERSION_QEMU:
|
case ZYNQMP_CSU_VERSION_QEMU:
|
||||||
return 50000000;
|
return 50000000;
|
||||||
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return mmio_read_32(IOU_SCNTRS_BASEFREQ);
|
return mmio_read_32(IOU_SCNTRS_BASEFREQ);
|
||||||
|
|
|
@ -311,6 +311,7 @@ uint64_t opteed_smc_handler(uint32_t smc_fid,
|
||||||
* OPTEE. Jump back to the original C runtime context.
|
* OPTEE. Jump back to the original C runtime context.
|
||||||
*/
|
*/
|
||||||
opteed_synchronous_sp_exit(optee_ctx, x1);
|
opteed_synchronous_sp_exit(optee_ctx, x1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -345,6 +346,7 @@ uint64_t opteed_smc_handler(uint32_t smc_fid,
|
||||||
* return value to the caller
|
* return value to the caller
|
||||||
*/
|
*/
|
||||||
opteed_synchronous_sp_exit(optee_ctx, x1);
|
opteed_synchronous_sp_exit(optee_ctx, x1);
|
||||||
|
break;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* OPTEE is returning from a call or being preempted from a call, in
|
* OPTEE is returning from a call or being preempted from a call, in
|
||||||
|
|
|
@ -49,6 +49,7 @@ uint64_t tlkd_va_translate(uintptr_t va, int type)
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert(0);
|
assert(0);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* get the (NS/S) physical address */
|
/* get the (NS/S) physical address */
|
||||||
|
|
|
@ -350,6 +350,7 @@ uint64_t tlkd_smc_handler(uint32_t smc_fid,
|
||||||
* context.
|
* context.
|
||||||
*/
|
*/
|
||||||
tlkd_synchronous_sp_exit(&tlk_ctx, x1);
|
tlkd_synchronous_sp_exit(&tlk_ctx, x1);
|
||||||
|
break;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* These function IDs are used only by TLK to indicate it has
|
* These function IDs are used only by TLK to indicate it has
|
||||||
|
@ -375,6 +376,7 @@ uint64_t tlkd_smc_handler(uint32_t smc_fid,
|
||||||
* return value to the caller
|
* return value to the caller
|
||||||
*/
|
*/
|
||||||
tlkd_synchronous_sp_exit(&tlk_ctx, x1);
|
tlkd_synchronous_sp_exit(&tlk_ctx, x1);
|
||||||
|
break;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Return the number of service function IDs implemented to
|
* Return the number of service function IDs implemented to
|
||||||
|
|
|
@ -435,6 +435,7 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
|
||||||
* context.
|
* context.
|
||||||
*/
|
*/
|
||||||
tspd_synchronous_sp_exit(tsp_ctx, x1);
|
tspd_synchronous_sp_exit(tsp_ctx, x1);
|
||||||
|
break;
|
||||||
#endif
|
#endif
|
||||||
/*
|
/*
|
||||||
* This function ID is used only by the SP to indicate it has finished
|
* This function ID is used only by the SP to indicate it has finished
|
||||||
|
@ -475,6 +476,7 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
|
||||||
* return value to the caller
|
* return value to the caller
|
||||||
*/
|
*/
|
||||||
tspd_synchronous_sp_exit(tsp_ctx, x1);
|
tspd_synchronous_sp_exit(tsp_ctx, x1);
|
||||||
|
break;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Request from non-secure client to perform an
|
* Request from non-secure client to perform an
|
||||||
|
@ -591,7 +593,6 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
|
||||||
SMC_RET3(ns_cpu_context, x1, x2, x3);
|
SMC_RET3(ns_cpu_context, x1, x2, x3);
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
|
||||||
/*
|
/*
|
||||||
* Request from the non-secure world to abort a preempted Yielding SMC
|
* Request from the non-secure world to abort a preempted Yielding SMC
|
||||||
* Call.
|
* Call.
|
||||||
|
|
|
@ -916,7 +916,6 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
|
||||||
ret = sdei_version();
|
ret = sdei_version();
|
||||||
SDEI_LOG("< VER:%lx\n", ret);
|
SDEI_LOG("< VER:%lx\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_REGISTER:
|
case SDEI_EVENT_REGISTER:
|
||||||
x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
|
x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
|
||||||
|
@ -925,32 +924,27 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
|
||||||
ret = sdei_event_register(x1, x2, x3, x4, x5);
|
ret = sdei_event_register(x1, x2, x3, x4, x5);
|
||||||
SDEI_LOG("< REG:%ld\n", ret);
|
SDEI_LOG("< REG:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_ENABLE:
|
case SDEI_EVENT_ENABLE:
|
||||||
SDEI_LOG("> ENABLE(n:%d)\n", (int) x1);
|
SDEI_LOG("> ENABLE(n:%d)\n", (int) x1);
|
||||||
ret = sdei_event_enable(x1);
|
ret = sdei_event_enable(x1);
|
||||||
SDEI_LOG("< ENABLE:%ld\n", ret);
|
SDEI_LOG("< ENABLE:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_DISABLE:
|
case SDEI_EVENT_DISABLE:
|
||||||
SDEI_LOG("> DISABLE(n:%d)\n", (int) x1);
|
SDEI_LOG("> DISABLE(n:%d)\n", (int) x1);
|
||||||
ret = sdei_event_disable(x1);
|
ret = sdei_event_disable(x1);
|
||||||
SDEI_LOG("< DISABLE:%ld\n", ret);
|
SDEI_LOG("< DISABLE:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_CONTEXT:
|
case SDEI_EVENT_CONTEXT:
|
||||||
SDEI_LOG("> CTX(p:%d):%lx\n", (int) x1, read_mpidr_el1());
|
SDEI_LOG("> CTX(p:%d):%lx\n", (int) x1, read_mpidr_el1());
|
||||||
ret = sdei_event_context(handle, x1);
|
ret = sdei_event_context(handle, x1);
|
||||||
SDEI_LOG("< CTX:%ld\n", ret);
|
SDEI_LOG("< CTX:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_COMPLETE_AND_RESUME:
|
case SDEI_EVENT_COMPLETE_AND_RESUME:
|
||||||
resume = 1;
|
resume = 1;
|
||||||
/* Fall through */
|
|
||||||
|
|
||||||
case SDEI_EVENT_COMPLETE:
|
case SDEI_EVENT_COMPLETE:
|
||||||
SDEI_LOG("> COMPLETE(r:%d sta/ep:%lx):%lx\n", resume, x1,
|
SDEI_LOG("> COMPLETE(r:%d sta/ep:%lx):%lx\n", resume, x1,
|
||||||
|
@ -969,92 +963,81 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
|
|
||||||
SMC_RET0(handle);
|
SMC_RET0(handle);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_STATUS:
|
case SDEI_EVENT_STATUS:
|
||||||
SDEI_LOG("> STAT(n:%d)\n", (int) x1);
|
SDEI_LOG("> STAT(n:%d)\n", (int) x1);
|
||||||
ret = sdei_event_status(x1);
|
ret = sdei_event_status(x1);
|
||||||
SDEI_LOG("< STAT:%ld\n", ret);
|
SDEI_LOG("< STAT:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_GET_INFO:
|
case SDEI_EVENT_GET_INFO:
|
||||||
SDEI_LOG("> INFO(n:%d, %d)\n", (int) x1, (int) x2);
|
SDEI_LOG("> INFO(n:%d, %d)\n", (int) x1, (int) x2);
|
||||||
ret = sdei_event_get_info(x1, x2);
|
ret = sdei_event_get_info(x1, x2);
|
||||||
SDEI_LOG("< INFO:%ld\n", ret);
|
SDEI_LOG("< INFO:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_UNREGISTER:
|
case SDEI_EVENT_UNREGISTER:
|
||||||
SDEI_LOG("> UNREG(n:%d)\n", (int) x1);
|
SDEI_LOG("> UNREG(n:%d)\n", (int) x1);
|
||||||
ret = sdei_event_unregister(x1);
|
ret = sdei_event_unregister(x1);
|
||||||
SDEI_LOG("< UNREG:%ld\n", ret);
|
SDEI_LOG("< UNREG:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_PE_UNMASK:
|
case SDEI_PE_UNMASK:
|
||||||
SDEI_LOG("> UNMASK:%lx\n", read_mpidr_el1());
|
SDEI_LOG("> UNMASK:%lx\n", read_mpidr_el1());
|
||||||
sdei_pe_unmask();
|
sdei_pe_unmask();
|
||||||
SDEI_LOG("< UNMASK:%d\n", 0);
|
SDEI_LOG("< UNMASK:%d\n", 0);
|
||||||
SMC_RET1(handle, 0);
|
SMC_RET1(handle, 0);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_PE_MASK:
|
case SDEI_PE_MASK:
|
||||||
SDEI_LOG("> MASK:%lx\n", read_mpidr_el1());
|
SDEI_LOG("> MASK:%lx\n", read_mpidr_el1());
|
||||||
ret = sdei_pe_mask();
|
ret = sdei_pe_mask();
|
||||||
SDEI_LOG("< MASK:%ld\n", ret);
|
SDEI_LOG("< MASK:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_INTERRUPT_BIND:
|
case SDEI_INTERRUPT_BIND:
|
||||||
SDEI_LOG("> BIND(%d)\n", (int) x1);
|
SDEI_LOG("> BIND(%d)\n", (int) x1);
|
||||||
ret = sdei_interrupt_bind(x1);
|
ret = sdei_interrupt_bind(x1);
|
||||||
SDEI_LOG("< BIND:%ld\n", ret);
|
SDEI_LOG("< BIND:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_INTERRUPT_RELEASE:
|
case SDEI_INTERRUPT_RELEASE:
|
||||||
SDEI_LOG("> REL(%d)\n", (int) x1);
|
SDEI_LOG("> REL(%d)\n", (int) x1);
|
||||||
ret = sdei_interrupt_release(x1);
|
ret = sdei_interrupt_release(x1);
|
||||||
SDEI_LOG("< REL:%ld\n", ret);
|
SDEI_LOG("< REL:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_SHARED_RESET:
|
case SDEI_SHARED_RESET:
|
||||||
SDEI_LOG("> S_RESET():%lx\n", read_mpidr_el1());
|
SDEI_LOG("> S_RESET():%lx\n", read_mpidr_el1());
|
||||||
ret = sdei_shared_reset();
|
ret = sdei_shared_reset();
|
||||||
SDEI_LOG("< S_RESET:%ld\n", ret);
|
SDEI_LOG("< S_RESET:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_PRIVATE_RESET:
|
case SDEI_PRIVATE_RESET:
|
||||||
SDEI_LOG("> P_RESET():%lx\n", read_mpidr_el1());
|
SDEI_LOG("> P_RESET():%lx\n", read_mpidr_el1());
|
||||||
ret = sdei_private_reset();
|
ret = sdei_private_reset();
|
||||||
SDEI_LOG("< P_RESET:%ld\n", ret);
|
SDEI_LOG("< P_RESET:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_ROUTING_SET:
|
case SDEI_EVENT_ROUTING_SET:
|
||||||
SDEI_LOG("> ROUTE_SET(n:%d f:%lx aff:%lx)\n", (int) x1, x2, x3);
|
SDEI_LOG("> ROUTE_SET(n:%d f:%lx aff:%lx)\n", (int) x1, x2, x3);
|
||||||
ret = sdei_event_routing_set(x1, x2, x3);
|
ret = sdei_event_routing_set(x1, x2, x3);
|
||||||
SDEI_LOG("< ROUTE_SET:%ld\n", ret);
|
SDEI_LOG("< ROUTE_SET:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_FEATURES:
|
case SDEI_FEATURES:
|
||||||
SDEI_LOG("> FTRS(f:%lx)\n", x1);
|
SDEI_LOG("> FTRS(f:%lx)\n", x1);
|
||||||
ret = sdei_features(x1);
|
ret = sdei_features(x1);
|
||||||
SDEI_LOG("< FTRS:%lx\n", ret);
|
SDEI_LOG("< FTRS:%lx\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
|
|
||||||
case SDEI_EVENT_SIGNAL:
|
case SDEI_EVENT_SIGNAL:
|
||||||
SDEI_LOG("> SIGNAL(e:%lx t:%lx)\n", x1, x2);
|
SDEI_LOG("> SIGNAL(e:%lx t:%lx)\n", x1, x2);
|
||||||
ret = sdei_signal(x1, x2);
|
ret = sdei_signal(x1, x2);
|
||||||
SDEI_LOG("< SIGNAL:%ld\n", ret);
|
SDEI_LOG("< SIGNAL:%ld\n", ret);
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
break;
|
|
||||||
default:
|
default:
|
||||||
|
/* Do nothing in default case */
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Reference in a new issue