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fix(errata): workaround for Cortex A78C erratum 2242638
Cortex A78C erratum 2242638 is a Cat B erratum which applies to revisions r0p1, r0p2 and is still open. The workaround is to apply a CPU implementation specific specific patch sequence. SDEN can be found here: https://developer.arm.com/documentation/SDEN2004089/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I35d385245a04a39b87be71c1a42312f75e1152e5
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@ -331,6 +331,10 @@ For Cortex-A78C, the following errata build flags are defined :
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Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and
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it is still open.
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- ``ERRATA_A78C_2242638`` : This applies errata 2242638 workaround to
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Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and
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it is still open.
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For Cortex-X1 CPU, the following errata build flags are defined:
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- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1
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@ -26,4 +26,12 @@
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#define CORTEX_A78C_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define CORTEX_A78C_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT U(1)
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/*******************************************************************************
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* CPU Implementation Specific Selected Instruction registers
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******************************************************************************/
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#define CORTEX_A78C_IMP_CPUPSELR_EL3 S3_6_C15_C8_0
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#define CORTEX_A78C_IMP_CPUPCR_EL3 S3_6_C15_C8_1
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#define CORTEX_A78C_IMP_CPUPOR_EL3 S3_6_C15_C8_2
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#define CORTEX_A78C_IMP_CPUPMR_EL3 S3_6_C15_C8_3
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#endif /* CORTEX_A78C_H */
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@ -58,6 +58,41 @@ func check_errata_2132064
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b cpu_rev_var_range
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endfunc check_errata_2132064
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/* --------------------------------------------------------------------
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* Errata Workaround for A78C Erratum 2242638.
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* This applies to revisions r0p1 and r0p2 of the Cortex A78C
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* processor and is still open.
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------------------------
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*/
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func errata_a78c_2242638_wa
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/* Compare x0 against revisions r0p1 - r0p2 */
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mov x17, x30
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bl check_errata_2242638
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cbz x0, 1f
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ldr x0, =0x5
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msr CORTEX_A78C_IMP_CPUPSELR_EL3, x0
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ldr x0, =0x10F600E000
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msr CORTEX_A78C_IMP_CPUPOR_EL3, x0
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ldr x0, =0x10FF80E000
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msr CORTEX_A78C_IMP_CPUPMR_EL3, x0
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ldr x0, =0x80000000003FF
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msr CORTEX_A78C_IMP_CPUPCR_EL3, x0
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isb
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1:
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ret x17
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endfunc errata_a78c_2242638_wa
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func check_errata_2242638
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/* Applies to revisions r0p1-r0p2. */
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mov x1, #CPU_REV(0, 1)
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mov x2, #CPU_REV(0, 2)
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b cpu_rev_var_range
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endfunc check_errata_2242638
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func check_errata_cve_2022_23960
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#if WORKAROUND_CVE_2022_23960
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mov x0, #ERRATA_APPLIES
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@ -81,6 +116,11 @@ func cortex_a78c_reset_func
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bl errata_a78c_2132064_wa
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#endif
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#if ERRATA_A78C_2242638
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mov x0, x18
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bl errata_a78c_2242638_wa
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#endif
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#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960
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/*
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* The Cortex-A78c generic vectors are overridden to apply errata
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@ -125,6 +165,7 @@ func cortex_a78c_errata_report
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* checking functions of each errata.
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*/
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report_errata ERRATA_A78C_2132064, cortex_a78c, 2132064
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report_errata ERRATA_A78C_2242638, cortex_a78c, 2242638
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report_errata WORKAROUND_CVE_2022_23960, cortex_a78c, cve_2022_23960
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ldp x8, x30, [sp], #16
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@ -365,6 +365,10 @@ ERRATA_A78_AE_2395408 ?=0
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# to revisions r0p1 and r0p2 of the A78C cpu. It is still open.
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ERRATA_A78C_2132064 ?=0
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# Flag to apply erratum 2242638 workaround during reset. This erratum applies
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# to revisions r0p1 and r0p2 of the A78C cpu. It is still open.
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ERRATA_A78C_2242638 ?=0
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# Flag to apply erratum 1821534 workaround during reset. This erratum applies
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# to revisions r0p0 - r1p0 of the X1 cpu and fixed in r1p1.
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ERRATA_X1_1821534 ?=0
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@ -923,6 +927,10 @@ $(eval $(call add_define,ERRATA_A78_AE_2395408))
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$(eval $(call assert_boolean,ERRATA_A78C_2132064))
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$(eval $(call add_define,ERRATA_A78C_2132064))
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# Process ERRATA_A78C_2242638 flag
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$(eval $(call assert_boolean,ERRATA_A78C_2242638))
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$(eval $(call add_define,ERRATA_A78C_2242638))
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# Process ERRATA_X1_1821534 flag
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$(eval $(call assert_boolean,ERRATA_X1_1821534))
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$(eval $(call add_define,ERRATA_X1_1821534))
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