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fix(gicv3): map generic interrupt type to GICv3 group
The generic interrupt controller identifies an interrupt based on its type whereas the GIC uses the notion of groups to identify an interrupt. Currently, they are used interchangeably in GICv3 driver. It did not cause any functional issues since the matching type and group had the same value for corresponding macros. This patch makes the necessary fixes. The generic interrupt controller APIs, such as plat_ic_set_interrupt_type map interrupt type to interrupt group supported by the GICv3 IP. Similarly, other generic interrupt controller APIs map interrupt group to interrupt type as needed. This patch also changes the name of the helper functions to use group rather than type for handling interrupts. Change-Id: Ie2d88a3260c71e4ab9c8baacde24cc21e551de3d Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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commit
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3 changed files with 48 additions and 21 deletions
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2023, NVIDIA Corporation. All rights reserved.
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* Copyright (c) 2023, NVIDIA Corporation. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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@ -421,16 +421,15 @@ unsigned int gicv3_get_pending_interrupt_type(void)
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}
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}
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/*******************************************************************************
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/*******************************************************************************
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* This function returns the type of the interrupt id depending upon the group
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* This function returns the group that has been configured under by the
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* this interrupt has been configured under by the interrupt controller i.e.
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* interrupt controller for the given interrupt id i.e. either group0 or group1
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* group0 or group1 Secure / Non Secure. The return value can be one of the
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* Secure / Non Secure. The return value can be one of the following :
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* following :
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* INTR_GROUP0 : The interrupt type is a Secure Group 0 interrupt
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* INTR_GROUP0 : The interrupt type is a Secure Group 0 interrupt
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* INTR_GROUP1S : The interrupt type is a Secure Group 1 secure interrupt
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* INTR_GROUP1S : The interrupt type is a Secure Group 1 secure interrupt
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* INTR_GROUP1NS: The interrupt type is a Secure Group 1 non secure
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* INTR_GROUP1NS: The interrupt type is a Secure Group 1 non secure
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* interrupt.
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* interrupt.
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******************************************************************************/
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******************************************************************************/
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unsigned int gicv3_get_interrupt_type(unsigned int id, unsigned int proc_num)
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unsigned int gicv3_get_interrupt_group(unsigned int id, unsigned int proc_num)
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{
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{
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unsigned int igroup, grpmodr;
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unsigned int igroup, grpmodr;
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uintptr_t gicr_base;
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uintptr_t gicr_base;
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@ -1059,8 +1058,8 @@ void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num,
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* is used if the interrupt is SGI or (E)PPI, and programs the corresponding
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* is used if the interrupt is SGI or (E)PPI, and programs the corresponding
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* Redistributor interface. The group can be any of GICV3_INTR_GROUP*
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* Redistributor interface. The group can be any of GICV3_INTR_GROUP*
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******************************************************************************/
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******************************************************************************/
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void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
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void gicv3_set_interrupt_group(unsigned int id, unsigned int proc_num,
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unsigned int type)
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unsigned int group)
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{
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{
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bool igroup = false, grpmod = false;
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bool igroup = false, grpmod = false;
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uintptr_t gicr_base;
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uintptr_t gicr_base;
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@ -1071,7 +1070,7 @@ void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs != NULL);
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assert(gicv3_driver_data->rdistif_base_addrs != NULL);
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switch (type) {
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switch (group) {
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case INTR_GROUP1S:
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case INTR_GROUP1S:
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igroup = false;
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igroup = false;
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grpmod = true;
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grpmod = true;
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -556,7 +556,7 @@ void gicv3_cpuif_enable(unsigned int proc_num);
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void gicv3_cpuif_disable(unsigned int proc_num);
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void gicv3_cpuif_disable(unsigned int proc_num);
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unsigned int gicv3_get_pending_interrupt_type(void);
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unsigned int gicv3_get_pending_interrupt_type(void);
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unsigned int gicv3_get_pending_interrupt_id(void);
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unsigned int gicv3_get_pending_interrupt_id(void);
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unsigned int gicv3_get_interrupt_type(unsigned int id,
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unsigned int gicv3_get_interrupt_group(unsigned int id,
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unsigned int proc_num);
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unsigned int proc_num);
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void gicv3_distif_init_restore(const gicv3_dist_ctx_t * const dist_ctx);
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void gicv3_distif_init_restore(const gicv3_dist_ctx_t * const dist_ctx);
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void gicv3_distif_save(gicv3_dist_ctx_t * const dist_ctx);
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void gicv3_distif_save(gicv3_dist_ctx_t * const dist_ctx);
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@ -579,8 +579,8 @@ void gicv3_enable_interrupt(unsigned int id, unsigned int proc_num);
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void gicv3_disable_interrupt(unsigned int id, unsigned int proc_num);
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void gicv3_disable_interrupt(unsigned int id, unsigned int proc_num);
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void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num,
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void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num,
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unsigned int priority);
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unsigned int priority);
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void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
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void gicv3_set_interrupt_group(unsigned int id, unsigned int proc_num,
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unsigned int type);
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unsigned int group);
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void gicv3_raise_sgi(unsigned int sgi_num, gicv3_irq_group_t group,
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void gicv3_raise_sgi(unsigned int sgi_num, gicv3_irq_group_t group,
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u_register_t target);
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u_register_t target);
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void gicv3_set_spi_routing(unsigned int id, unsigned int irm,
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void gicv3_set_spi_routing(unsigned int id, unsigned int irm,
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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* Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
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* Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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@ -47,10 +47,6 @@
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#pragma weak plat_ic_set_interrupt_pending
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#pragma weak plat_ic_set_interrupt_pending
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#pragma weak plat_ic_clear_interrupt_pending
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#pragma weak plat_ic_clear_interrupt_pending
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CASSERT((INTR_TYPE_S_EL1 == INTR_GROUP1S) &&
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(INTR_TYPE_NS == INTR_GROUP1NS) &&
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(INTR_TYPE_EL3 == INTR_GROUP0), assert_interrupt_type_mismatch);
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/*
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/*
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* This function returns the highest priority pending interrupt at
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* This function returns the highest priority pending interrupt at
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* the Interrupt controller
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* the Interrupt controller
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@ -116,12 +112,26 @@ uint32_t plat_ic_acknowledge_interrupt(void)
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/*
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/*
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* This function returns the type of the interrupt `id`, depending on how
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* This function returns the type of the interrupt `id`, depending on how
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* the interrupt has been configured in the interrupt controller
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* the interrupt has been configured in the interrupt controller.
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*/
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*/
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uint32_t plat_ic_get_interrupt_type(uint32_t id)
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uint32_t plat_ic_get_interrupt_type(uint32_t id)
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{
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{
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unsigned int group;
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assert(IS_IN_EL3());
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assert(IS_IN_EL3());
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return gicv3_get_interrupt_type(id, plat_my_core_pos());
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group = gicv3_get_interrupt_group(id, plat_my_core_pos());
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switch (group) {
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case INTR_GROUP0:
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return INTR_TYPE_EL3;
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case INTR_GROUP1S:
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return INTR_TYPE_S_EL1;
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case INTR_GROUP1NS:
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return INTR_TYPE_NS;
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default:
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assert(false); /* Unreachable */
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return INTR_TYPE_EL3;
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}
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}
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}
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/*
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/*
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@ -234,7 +244,25 @@ int plat_ic_has_interrupt_type(unsigned int type)
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void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
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void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
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{
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{
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gicv3_set_interrupt_type(id, plat_my_core_pos(), type);
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unsigned int group;
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switch (type) {
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case INTR_TYPE_EL3:
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group = INTR_GROUP0;
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break;
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case INTR_TYPE_S_EL1:
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group = INTR_GROUP1S;
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break;
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case INTR_TYPE_NS:
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group = INTR_GROUP1NS;
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break;
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default:
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assert(false); /* Unreachable */
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group = INTR_GROUP0;
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break;
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}
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gicv3_set_interrupt_group(id, plat_my_core_pos(), group);
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}
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}
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void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target)
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void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target)
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