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chore(gicv2): use interrupt group instead of type

Browse source 
The generic interrupt controller identifies an interrupt based on its
type whereas the GIC uses the notion of groups to identify an
interrupt.

This patch changes the name of the helper functions to use group
rather than type for handling interrupts. No functional change in this
patch.

Change-Id: If13ec65cc6c87c2da73a3d54b033f02635ff924a
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
This commit is contained in:
Madhukar Pappireddy 2023-08-03 12:13:27 -05:00
parent 9c44778818
commit ab80cf35e7
4 changed files with 14 additions and 11 deletions
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3
changelog.yaml
View file

@ -902,6 +902,9 @@ subsections:
- title: GIC-600AE
scope: gic600ae
- title: GICv2
scope: gicv2
- title: SMMU
scope: smmu

6
drivers/arm/gic/v2/gicv2_main.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
* Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -390,7 +390,7 @@ void gicv2_set_interrupt_priority(unsigned int id, unsigned int priority)
* This function assigns group for the interrupt identified by id. The group can
* be any of GICV2_INTR_GROUP*
******************************************************************************/
void gicv2_set_interrupt_type(unsigned int id, unsigned int type)
void gicv2_set_interrupt_group(unsigned int id, unsigned int group)
{
assert(driver_data != NULL);
assert(driver_data->gicd_base != 0U);
@ -398,7 +398,7 @@ void gicv2_set_interrupt_type(unsigned int id, unsigned int type)
/* Serialize read-modify-write to Distributor registers */
spin_lock(&gic_lock);
switch (type) {
switch (group) {
case GICV2_INTR_GROUP1:
gicd_set_igroupr(driver_data->gicd_base, id);
break;

4
include/drivers/arm/gicv2.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
* Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -188,7 +188,7 @@ unsigned int gicv2_get_interrupt_active(unsigned int id);
void gicv2_enable_interrupt(unsigned int id);
void gicv2_disable_interrupt(unsigned int id);
void gicv2_set_interrupt_priority(unsigned int id, unsigned int priority);
void gicv2_set_interrupt_type(unsigned int id, unsigned int type);
void gicv2_set_interrupt_group(unsigned int id, unsigned int group);
void gicv2_raise_sgi(int sgi_num, bool ns, int proc_num);
void gicv2_set_spi_routing(unsigned int id, int proc_num);
void gicv2_set_interrupt_pending(unsigned int id);

12
plat/common/plat_gicv2.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
* Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -216,7 +216,7 @@ int plat_ic_has_interrupt_type(unsigned int type)
void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
{
unsigned int gicv2_type = 0U;
unsigned int gicv2_group = 0U;
/* Map canonical interrupt type to GICv2 type */
switch (type) {
@ -225,17 +225,17 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
#else
case INTR_TYPE_S_EL1:
#endif
gicv2_type = GICV2_INTR_GROUP0;
gicv2_group = GICV2_INTR_GROUP0;
break;
case INTR_TYPE_NS:
gicv2_type = GICV2_INTR_GROUP1;
gicv2_group = GICV2_INTR_GROUP1;
break;
default:
assert(0); /* Unreachable */
assert(false); /* Unreachable */
break;
}
gicv2_set_interrupt_type(id, gicv2_type);
gicv2_set_interrupt_group(id, gicv2_group);
}
void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target)