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feat(tc): add TC3 platform definitions

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TC3 is a little different from TC2:

 * new address for its second DRAM bank
 * new CPUs
 * a few interrupts have changed
 * new SCP MHU base address.
 * utility space address (needed for MPAM) is different
 * no CMN (and therefore cmn-pmu)
 * the uart clock is different

This requires the dts to be different between revisions for the first
time. Introduce a tc_vers.dtsi that includes only definitions for things
that are different.

Signed-off-by: Tintu Thomas <tintu.thomas@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I2940d87a69ea93502b7f5a22a539e4b70a63e827
This commit is contained in:
Boyan Karatotev 2023-07-07 13:33:19 +00:00
parent 0427414956
commit 62320dc4fd
4 changed files with 59 additions and 21 deletions
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21
fdts/tc.dts
View file

@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "tc_vers.dtsi"
/ {
compatible = "arm,tc";
@ -254,21 +255,21 @@
};
};
mbox_db_rx: mhu@45010000 {
mbox_db_rx: mhu@MHU_RX_ADDR() {
compatible = "arm,mhuv2-rx","arm,primecell";
reg = <0x0 0x45010000 0x0 0x1000>;
reg = <0x0 MHU_RX_ADDR(0x) 0x0 0x1000>;
clocks = <&soc_refclk>;
clock-names = "apb_pclk";
#mbox-cells = <2>;
interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI INT_MBOX_RX IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mhu_rx";
mhu-protocol = "doorbell";
arm,mhuv2-protocols = <0 1>;
};
mbox_db_tx: mhu@45000000 {
mbox_db_tx: mhu@MHU_TX_ADDR() {
compatible = "arm,mhuv2-tx","arm,primecell";
reg = <0x0 0x45000000 0x0 0x1000>;
reg = <0x0 MHU_TX_ADDR(0x) 0x0 0x1000>;
clocks = <&soc_refclk>;
clock-names = "apb_pclk";
#mbox-cells = <2>;
@ -277,12 +278,6 @@
arm,mhuv2-protocols = <0 1>;
};
cmn-pmu {
compatible = "arm,ci-700";
reg = <0x0 0x50000000 0x0 0x10000000>;
interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
};
scmi {
compatible = "arm,scmi";
mbox-names = "tx", "rx";
@ -344,7 +339,7 @@
soc_uartclk: uartclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-frequency = <UARTCLK_FREQ>;
clock-output-names = "uartclk";
};
@ -552,7 +547,7 @@
*/
msc0 {
compatible = "arm,mpam-msc";
reg = <0x1 0x00010000 0x0 0x2000>;
reg = <MPAM_ADDR 0x0 0x2000>;
};
ete0 {

32
fdts/tc_vers.dtsi Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (c) 2023-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#if TARGET_PLATFORM <= 2
#define INT_MBOX_RX 317
#define MHU_TX_ADDR(pref) pref##45000000 /* hex */
#define MHU_RX_ADDR(pref) pref##45010000 /* hex */
#define MPAM_ADDR 0x1 0x00010000 /* 0x1_0001_0000 */
#define UARTCLK_FREQ 5000000
#elif TARGET_PLATFORM == 3
#define INT_MBOX_RX 300
#define MHU_TX_ADDR(pref) pref##46040000 /* hex */
#define MHU_RX_ADDR(pref) pref##46140000 /* hex */
#define MPAM_ADDR 0x0 0x5f010000 /* 0x5f01_0000 */
#define UARTCLK_FREQ 3750000
#endif /* TARGET_PLATFORM == 3 */
/ {
#if TARGET_PLATFORM <= 2
cmn-pmu {
compatible = "arm,ci-700";
reg = <0x0 0x50000000 0x0 0x10000000>;
interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
};
#endif /* TARGET_PLATFORM <= 2 */
};

10
plat/arm/board/tc/include/platform_def.h
View file

@ -208,7 +208,11 @@
#define PLAT_ARM_NSRAM_BASE 0x06000000
#define PLAT_ARM_NSRAM_SIZE 0x00080000 /* 512KB */
#if TARGET_PLATFORM <= 2
#define PLAT_ARM_DRAM2_BASE ULL(0x8080000000)
#elif TARGET_PLATFORM == 3
#define PLAT_ARM_DRAM2_BASE ULL(0x880000000)
#endif /* TARGET_PLATFORM == 3 */
#define PLAT_ARM_DRAM2_SIZE ULL(0x180000000)
#define PLAT_ARM_DRAM2_END (PLAT_ARM_DRAM2_BASE + PLAT_ARM_DRAM2_SIZE - 1ULL)
@ -258,7 +262,11 @@
#define PLAT_MAX_PE_PER_CPU U(1)
/* Message Handling Unit (MHU) base addresses */
#define PLAT_CSS_MHU_BASE UL(0x45400000)
#if TARGET_PLATFORM <= 2
#define PLAT_CSS_MHU_BASE UL(0x45400000)
#elif TARGET_PLATFORM == 3
#define PLAT_CSS_MHU_BASE UL(0x46000000)
#endif /* TARGET_PLATFORM == 3 */
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
/* TC2: AP<->RSS MHUs */

17
plat/arm/board/tc/platform.mk
View file

@ -5,17 +5,13 @@
include common/fdt_wrappers.mk
ifeq ($(TARGET_PLATFORM), 0)
$(error Platform ${PLAT}$(TARGET_PLATFORM) is deprecated.)
endif
ifeq ($(TARGET_PLATFORM), 1)
ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
Some of the features might not work as expected)
endif
ifeq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0)
$(error TARGET_PLATFORM must be less than or equal to 2)
ifeq ($(shell expr $(TARGET_PLATFORM) \<= 3), 0)
$(error TARGET_PLATFORM must be less than or equal to 3)
endif
$(eval $(call add_define,TARGET_PLATFORM))
@ -87,6 +83,13 @@ TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
lib/cpus/aarch64/cortex_x4.S
endif
# CPU libraries for TARGET_PLATFORM=3
ifeq (${TARGET_PLATFORM}, 3)
TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
lib/cpus/aarch64/cortex_chaberton.S \
lib/cpus/aarch64/cortex_blackhawk.S
endif
INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \