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Merge "feat(ls1043ardb): update ddr configure for ls1043ardb-pd" into integration

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Madhukar Pappireddy 2022-09-29 16:45:48 +02:00 • committed by TrustedFirmware Code Review
commit 62068b10a3
1 changed files with 17 additions and 13 deletions
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30
plat/nxp/soc-ls1043a/ls1043ardb/ddr_init.c
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@ -85,32 +85,36 @@ int ddr_board_options(struct ddr_info *priv)
return 0; return 0;
} }
/* DDR model number: MT40A512M8HX-093E */ /* DDR model number: MT40A1G8SA-062E:R */
struct dimm_params ddr_raw_timing = { struct dimm_params ddr_raw_timing = {
.n_ranks = U(1), .n_ranks = U(1),
.rank_density = ULL(2147483648), .rank_density = ULL(2147483648),
.capacity = ULL(2147483648), .capacity = ULL(2147483648),
.primary_sdram_width = U(32), .primary_sdram_width = U(32),
.n_row_addr = U(15), .ec_sdram_width = U(4),
.rdimm = U(0),
.mirrored_dimm = U(0),
.n_row_addr = U(16),
.n_col_addr = U(10), .n_col_addr = U(10),
.bank_group_bits = U(2), .bank_group_bits = U(2),
.edc_config = U(2),
.burst_lengths_bitmask = U(0x0c), .burst_lengths_bitmask = U(0x0c),
.tckmin_x_ps = 938, .tckmin_x_ps = 625,
.tckmax_ps = 1500, .tckmax_ps = 2200,
.caslat_x = U(0x000DFA00), .caslat_x = U(0x0001FFE00),
.taa_ps = 13500, .taa_ps = 13500,
.trcd_ps = 13500, .trcd_ps = 13500,
.trp_ps = 13500, .trp_ps = 13500,
.tras_ps = 33000, .tras_ps = 32000,
.trc_ps = 46500, .trc_ps = 45500,
.twr_ps = 15000, .twr_ps = 15000,
.trfc1_ps = 260000, .trfc1_ps = 350000,
.trfc2_ps = 160000, .trfc2_ps = 260000,
.trfc4_ps = 110000, .trfc4_ps = 160000,
.tfaw_ps = 21000, .tfaw_ps = 21000,
.trrds_ps = 3700, .trrds_ps = 3000,
.trrdl_ps = 5300, .trrdl_ps = 4900,
.tccdl_ps = 5355, .tccdl_ps = 5000,
.refresh_rate_ps = U(7800000), .refresh_rate_ps = U(7800000),
.rc = U(0x1f), .rc = U(0x1f),
}; };