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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes I6ac59693,Ib0e4e5cf into integration
* changes: refactor(tc): reorder config variable defines refactor(tc): move DTB to start of DRAM
This commit is contained in:
commit
61ee40b1c9
3 changed files with 42 additions and 56 deletions
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@ -1,10 +1,11 @@
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/*
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/*
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* Copyright (c) 2020-2021, Arm Limited. All rights reserved.
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* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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#include <common/tbbr/tbbr_img_def.h>
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#include <common/tbbr/tbbr_img_def.h>
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#include <platform_def.h>
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/dts-v1/;
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/dts-v1/;
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@ -25,8 +26,8 @@
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};
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};
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hw-config {
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hw-config {
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load-address = <0x0 0x83000000>;
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load-address = <0x0 PLAT_HW_CONFIG_DTB_BASE>;
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max-size = <0x8000>;
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max-size = <PLAT_HW_CONFIG_DTB_SIZE>;
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id = <HW_CONFIG_ID>;
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id = <HW_CONFIG_ID>;
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};
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};
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};
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};
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@ -28,6 +28,11 @@
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* - Region to load secure partitions
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* - Region to load secure partitions
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*
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*
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*
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*
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* 0x8000_0000 ------------------ TC_NS_DRAM1_BASE
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* | DTB |
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* | (32K) |
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* 0x8000_8000 ------------------
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* | ... |
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* 0xf8a0_0000 ------------------ TC_NS_FWU_BASE
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* 0xf8a0_0000 ------------------ TC_NS_FWU_BASE
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* | FWU shmem |
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* | FWU shmem |
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* | (4MB) |
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* | (4MB) |
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@ -79,7 +84,7 @@
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TC_TZC_DRAM1_SIZE, \
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TC_TZC_DRAM1_SIZE, \
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MT_MEMORY | MT_RW | MT_SECURE)
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MT_MEMORY | MT_RW | MT_SECURE)
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#define PLAT_HW_CONFIG_DTB_BASE ULL(0x83000000)
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#define PLAT_HW_CONFIG_DTB_BASE TC_NS_DRAM1_BASE
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#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
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#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
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#define PLAT_DTB_DRAM_NS MAP_REGION_FLAT( \
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#define PLAT_DTB_DRAM_NS MAP_REGION_FLAT( \
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@ -13,6 +13,38 @@ TC_SCMI_PD_CTRL_EN := 1
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# IOMMU: Enable the use of system or individual MMUs
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# IOMMU: Enable the use of system or individual MMUs
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TC_IOMMU_EN := 1
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TC_IOMMU_EN := 1
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# System setup
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CSS_USE_SCMI_SDS_DRIVER := 1
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HW_ASSISTED_COHERENCY := 1
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USE_COHERENT_MEM := 0
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GIC_ENABLE_V4_EXTN := 1
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GICV3_SUPPORT_GIC600 := 1
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override NEED_BL2U := no
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override ARM_PLAT_MT := 1
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# CPU setup
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ARM_ARCH_MINOR := 7
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BRANCH_PROTECTION := 1
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ENABLE_FEAT_MPAM := 1 # default is 2, optimise
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ENABLE_SVE_FOR_NS := 2 # to show we use it
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ENABLE_SVE_FOR_SWD := 1
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ENABLE_TRBE_FOR_NS := 1
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ENABLE_SYS_REG_TRACE_FOR_NS := 1
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ENABLE_FEAT_AMU := 1
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ENABLE_AMU_FCONF := 1
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ENABLE_AMU_AUXILIARY_COUNTERS := 1
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ENABLE_MPMM := 1
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ENABLE_MPMM_FCONF := 1
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CTX_INCLUDE_AARCH32_REGS := 0
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ifeq (${SPD},spmd)
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SPMD_SPM_AT_SEL2 := 1
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ENABLE_FEAT_MTE := 1
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CTX_INCLUDE_PAUTH_REGS := 1
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endif
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ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
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ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
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$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
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$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
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Some of the features might not work as expected)
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Some of the features might not work as expected)
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@ -36,41 +68,6 @@ $(eval $(call add_defines, \
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CSS_LOAD_SCP_IMAGES := 1
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CSS_LOAD_SCP_IMAGES := 1
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CSS_USE_SCMI_SDS_DRIVER := 1
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ENABLE_FEAT_RAS := 1
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SDEI_SUPPORT := 0
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EL3_EXCEPTION_HANDLING := 0
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HANDLE_EA_EL3_FIRST_NS := 0
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# System coherency is managed in hardware
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HW_ASSISTED_COHERENCY := 1
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# When building for systems with hardware-assisted coherency, there's no need to
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# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
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USE_COHERENT_MEM := 0
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GIC_ENABLE_V4_EXTN := 1
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# GIC-600 configuration
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GICV3_SUPPORT_GIC600 := 1
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# Enable SVE
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ENABLE_SVE_FOR_NS := 2
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ENABLE_SVE_FOR_SWD := 1
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# enable trace buffer control registers access to NS by default
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ENABLE_TRBE_FOR_NS := 1
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# enable trace system registers access to NS by default
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ENABLE_SYS_REG_TRACE_FOR_NS := 1
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# enable trace filter control registers access to NS by default
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ENABLE_TRF_FOR_NS := 1
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# Include GICv3 driver files
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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include drivers/arm/gic/v3/gicv3.mk
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@ -78,10 +75,6 @@ ENT_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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plat/arm/common/arm_gicv3.c
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override NEED_BL2U := no
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override ARM_PLAT_MT := 1
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TC_BASE = plat/arm/board/tc
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TC_BASE = plat/arm/board/tc
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PLAT_INCLUDES += -I${TC_BASE}/include/ \
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PLAT_INCLUDES += -I${TC_BASE}/include/ \
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@ -174,19 +167,6 @@ $(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
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$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
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override CTX_INCLUDE_AARCH32_REGS := 0
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override CTX_INCLUDE_PAUTH_REGS := 1
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override ENABLE_SPE_FOR_NS := 0
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override ENABLE_FEAT_AMU := 1
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ENABLE_AMU_AUXILIARY_COUNTERS := 1
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ENABLE_AMU_FCONF := 1
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ENABLE_MPMM := 1
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ENABLE_MPMM_FCONF := 1
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# Include Measured Boot makefile before any Crypto library makefile.
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# Include Measured Boot makefile before any Crypto library makefile.
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# Crypto library makefile may need default definitions of Measured Boot build
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# Crypto library makefile may need default definitions of Measured Boot build
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# flags present in Measured Boot makefile.
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# flags present in Measured Boot makefile.
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