From d585aa162e34b1828bc8dec7a0ed504b33e58ffb Mon Sep 17 00:00:00 2001
From: Boyan Karatotev <boyan.karatotev@arm.com>
Date: Thu, 28 Sep 2023 13:31:51 +0000
Subject: [PATCH 1/2] refactor(tc): move DTB to start of DRAM
Now that tf-a passes the DTB address to BL33, its location doesn't
matter. Since we declare a fixed size for it (32K) put it at the start
of ram to not fragment memory. This has the added benefit of
"supporting" larger kernel sizes which are breaking with the current
location.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ib0e4e5cf780bd58a49a34d72085b0a0914c340ed
---
plat/arm/board/tc/fdts/tc_fw_config.dts | 7 ++++---
plat/arm/board/tc/include/platform_def.h | 7 ++++++-
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/plat/arm/board/tc/fdts/tc_fw_config.dts b/plat/arm/board/tc/fdts/tc_fw_config.dts
index a84c7f85f..982da5b3a 100644
--- a/plat/arm/board/tc/fdts/tc_fw_config.dts
+++ b/plat/arm/board/tc/fdts/tc_fw_config.dts
@@ -1,10 +1,11 @@
/*
- * Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/tbbr/tbbr_img_def.h>
+#include <platform_def.h>
/dts-v1/;
@@ -25,8 +26,8 @@
};
hw-config {
- load-address = <0x0 0x83000000>;
- max-size = <0x8000>;
+ load-address = <0x0 PLAT_HW_CONFIG_DTB_BASE>;
+ max-size = <PLAT_HW_CONFIG_DTB_SIZE>;
id = <HW_CONFIG_ID>;
};
};
diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h
index 130111ede..a42e39dbe 100644
--- a/plat/arm/board/tc/include/platform_def.h
+++ b/plat/arm/board/tc/include/platform_def.h
@@ -28,6 +28,11 @@
* - Region to load secure partitions
*
*
+ * 0x8000_0000 ------------------ TC_NS_DRAM1_BASE
+ * | DTB |
+ * | (32K) |
+ * 0x8000_8000 ------------------
+ * | ... |
* 0xf8a0_0000 ------------------ TC_NS_FWU_BASE
* | FWU shmem |
* | (4MB) |
@@ -79,7 +84,7 @@
TC_TZC_DRAM1_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
-#define PLAT_HW_CONFIG_DTB_BASE ULL(0x83000000)
+#define PLAT_HW_CONFIG_DTB_BASE TC_NS_DRAM1_BASE
#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
#define PLAT_DTB_DRAM_NS MAP_REGION_FLAT( \
From 96a5f8762cfc948dc0f992c855d3d873dd547a9c Mon Sep 17 00:00:00 2001
From: Boyan Karatotev <boyan.karatotev@arm.com>
Date: Wed, 27 Dec 2023 15:49:18 +0000
Subject: [PATCH 2/2] refactor(tc): reorder config variable defines
They are very scattered, hard to read, and especially hard to track
down. As a result some are duplicate and some are overridden in the
downstream as it's simpler.
Put all variables at the top of the platform makefile. Also drop setting
variables that don't change from their default values
(CTX_INCLUDE_EL2_REGS, ARCH, ENABLE_FEAT_RAS, SDEI_SUPPORT,
EL3_EXCEPTION_HANDLING, HANDLE_EA_EL3_FIRST_NS, ENABLE_SPE_FOR_NS).
While we're at it, add some variables that are necessary. SPMD
requires MTE registers to be saved, BRANCH_PROTECTION, as well as
running at SEL2. All of our CPUs are Armv8.7 compliant so we can have
ARM_ARCH_MINOR=7 (and drop ENABLE_TRF_FOR_NS which it includes).
Finally, drop the override directives as there's no reason to prohibit
experimentation (even if incorrect).
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I6ac596934952aab8abf5d4db5220e13a4941a10c
---
plat/arm/board/tc/platform.mk | 84 +++++++++++++----------------------
1 file changed, 32 insertions(+), 52 deletions(-)
diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk
index 5be1234d2..652a17e33 100644
--- a/plat/arm/board/tc/platform.mk
+++ b/plat/arm/board/tc/platform.mk
@@ -13,6 +13,38 @@ TC_SCMI_PD_CTRL_EN := 1
# IOMMU: Enable the use of system or individual MMUs
TC_IOMMU_EN := 1
+# System setup
+CSS_USE_SCMI_SDS_DRIVER := 1
+HW_ASSISTED_COHERENCY := 1
+USE_COHERENT_MEM := 0
+GIC_ENABLE_V4_EXTN := 1
+GICV3_SUPPORT_GIC600 := 1
+override NEED_BL2U := no
+override ARM_PLAT_MT := 1
+
+# CPU setup
+ARM_ARCH_MINOR := 7
+BRANCH_PROTECTION := 1
+ENABLE_FEAT_MPAM := 1 # default is 2, optimise
+ENABLE_SVE_FOR_NS := 2 # to show we use it
+ENABLE_SVE_FOR_SWD := 1
+ENABLE_TRBE_FOR_NS := 1
+ENABLE_SYS_REG_TRACE_FOR_NS := 1
+ENABLE_FEAT_AMU := 1
+ENABLE_AMU_FCONF := 1
+ENABLE_AMU_AUXILIARY_COUNTERS := 1
+ENABLE_MPMM := 1
+ENABLE_MPMM_FCONF := 1
+
+CTX_INCLUDE_AARCH32_REGS := 0
+
+ifeq (${SPD},spmd)
+ SPMD_SPM_AT_SEL2 := 1
+ ENABLE_FEAT_MTE := 1
+ CTX_INCLUDE_PAUTH_REGS := 1
+endif
+
+
ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
Some of the features might not work as expected)
@@ -36,41 +68,6 @@ $(eval $(call add_defines, \
CSS_LOAD_SCP_IMAGES := 1
-CSS_USE_SCMI_SDS_DRIVER := 1
-
-ENABLE_FEAT_RAS := 1
-
-SDEI_SUPPORT := 0
-
-EL3_EXCEPTION_HANDLING := 0
-
-HANDLE_EA_EL3_FIRST_NS := 0
-
-# System coherency is managed in hardware
-HW_ASSISTED_COHERENCY := 1
-
-# When building for systems with hardware-assisted coherency, there's no need to
-# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
-USE_COHERENT_MEM := 0
-
-GIC_ENABLE_V4_EXTN := 1
-
-# GIC-600 configuration
-GICV3_SUPPORT_GIC600 := 1
-
-# Enable SVE
-ENABLE_SVE_FOR_NS := 2
-ENABLE_SVE_FOR_SWD := 1
-
-# enable trace buffer control registers access to NS by default
-ENABLE_TRBE_FOR_NS := 1
-
-# enable trace system registers access to NS by default
-ENABLE_SYS_REG_TRACE_FOR_NS := 1
-
-# enable trace filter control registers access to NS by default
-ENABLE_TRF_FOR_NS := 1
-
# Include GICv3 driver files
include drivers/arm/gic/v3/gicv3.mk
@@ -78,10 +75,6 @@ ENT_GIC_SOURCES := ${GICV3_SOURCES} \
plat/common/plat_gicv3.c \
plat/arm/common/arm_gicv3.c
-override NEED_BL2U := no
-
-override ARM_PLAT_MT := 1
-
TC_BASE = plat/arm/board/tc
PLAT_INCLUDES += -I${TC_BASE}/include/ \
@@ -174,19 +167,6 @@ $(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))
# Add the HW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
-override CTX_INCLUDE_AARCH32_REGS := 0
-
-override CTX_INCLUDE_PAUTH_REGS := 1
-
-override ENABLE_SPE_FOR_NS := 0
-
-override ENABLE_FEAT_AMU := 1
-ENABLE_AMU_AUXILIARY_COUNTERS := 1
-ENABLE_AMU_FCONF := 1
-
-ENABLE_MPMM := 1
-ENABLE_MPMM_FCONF := 1
-
# Include Measured Boot makefile before any Crypto library makefile.
# Crypto library makefile may need default definitions of Measured Boot build
# flags present in Measured Boot makefile.