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fix(cpus): workaround for Cortex-X4 erratum 2897503

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Cortex-X4 erratum 2897503 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2.

The workaround is to set CPUACTLR4_EL1[8] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I3178a890b6f1307b310e817af75f8fdfb8668cc9
This commit is contained in:
Arvind Ram Prakash 2024-08-26 17:04:27 -05:00
parent 833e59c0c1
commit 609d08a86d
4 changed files with 14 additions and 0 deletions
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3
docs/design/cpu-specific-build-macros.rst
View file

@ -840,6 +840,9 @@ For Cortex-X4, the following errata build flags are defined :
- ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4 - ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
- ``ERRATA_X4_2897503``: This applies errata 2897503 workaround to Cortex-X4
CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
For Cortex-A510, the following errata build flags are defined : For Cortex-A510, the following errata build flags are defined :
- ``ERRATA_A510_1922240``: This applies errata 1922240 workaround to - ``ERRATA_A510_1922240``: This applies errata 1922240 workaround to

1
include/lib/cpus/aarch64/cortex_x4.h
View file

@ -27,6 +27,7 @@
* CPU Auxiliary control register specific definitions * CPU Auxiliary control register specific definitions
******************************************************************************/ ******************************************************************************/
#define CORTEX_X4_CPUACTLR3_EL1 S3_0_C15_C1_2 #define CORTEX_X4_CPUACTLR3_EL1 S3_0_C15_C1_2
#define CORTEX_X4_CPUACTLR4_EL1 S3_0_C15_C1_3
/******************************************************************************* /*******************************************************************************
* CPU Auxiliary control register 5 specific definitions * CPU Auxiliary control register 5 specific definitions

6
lib/cpus/aarch64/cortex_x4.S
View file

@ -69,6 +69,12 @@ workaround_reset_end cortex_x4, ERRATUM(2816013)
check_erratum_ls cortex_x4, ERRATUM(2816013), CPU_REV(0, 1) check_erratum_ls cortex_x4, ERRATUM(2816013), CPU_REV(0, 1)
workaround_reset_start cortex_x4, ERRATUM(2897503), ERRATA_X4_2897503
sysreg_bit_set CORTEX_X4_CPUACTLR4_EL1, BIT(8)
workaround_reset_end cortex_x4, ERRATUM(2897503)
check_erratum_ls cortex_x4, ERRATUM(2897503), CPU_REV(0, 1)
workaround_reset_start cortex_x4, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 workaround_reset_start cortex_x4, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
#if IMAGE_BL31 #if IMAGE_BL31
/* /*

4
lib/cpus/cpu-ops.mk
View file

@ -839,6 +839,10 @@ CPU_FLAG_LIST += ERRATA_X4_2763018
# to revisions r0p0 and r0p1 of the Cortex-X4 cpu. It is fixed in r0p2. # to revisions r0p0 and r0p1 of the Cortex-X4 cpu. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_X4_2816013 CPU_FLAG_LIST += ERRATA_X4_2816013
# Flag to apply erratum 2897503 workaround on reset. This erratum applies
# to revisions r0p0 and r0p1 of the Cortex-X4 cpu. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_X4_2897503
# Flag to apply erratum 1922240 workaround during reset. This erratum applies # Flag to apply erratum 1922240 workaround during reset. This erratum applies
# to revision r0p0 of the Cortex-A510 cpu and is fixed in r0p1. # to revision r0p0 of the Cortex-A510 cpu and is fixed in r0p1.
CPU_FLAG_LIST += ERRATA_A510_1922240 CPU_FLAG_LIST += ERRATA_A510_1922240