Merge "fix(brbe): allow RME builds with BRBE" into integration

This commit is contained in:
Olivier Deprez 2024-10-21 12:12:17 +02:00 committed by TrustedFirmware Code Review
commit 5ec9ade9dd
4 changed files with 10 additions and 17 deletions

View file

@ -597,19 +597,11 @@ endif #(SUPPORT_STACK_MEMTAG)
################################################################################ ################################################################################
# FEAT_RME # FEAT_RME
ifeq (${ENABLE_RME},1) ifeq (${ENABLE_RME},1)
# RME doesn't support BRBE
ENABLE_BRBE_FOR_NS := 0
# RME doesn't support PIE # RME doesn't support PIE
ifneq (${ENABLE_PIE},0) ifneq (${ENABLE_PIE},0)
$(error ENABLE_RME does not support PIE) $(error ENABLE_RME does not support PIE)
endif endif
# RME doesn't support BRBE
ifneq (${ENABLE_BRBE_FOR_NS},0)
$(error ENABLE_RME does not support BRBE.)
endif
# RME requires AARCH64 # RME requires AARCH64
ifneq (${ARCH},aarch64) ifneq (${ARCH},aarch64)
$(error ENABLE_RME requires AArch64) $(error ENABLE_RME requires AArch64)

View file

@ -633,6 +633,8 @@
/* MDCR_EL3 definitions */ /* MDCR_EL3 definitions */
#define MDCR_EBWE_BIT (ULL(1) << 43) #define MDCR_EBWE_BIT (ULL(1) << 43)
#define MDCR_E3BREC (ULL(1) << 38)
#define MDCR_E3BREW (ULL(1) << 37)
#define MDCR_EnPMSN_BIT (ULL(1) << 36) #define MDCR_EnPMSN_BIT (ULL(1) << 36)
#define MDCR_MPMX_BIT (ULL(1) << 35) #define MDCR_MPMX_BIT (ULL(1) << 35)
#define MDCR_MCCD_BIT (ULL(1) << 34) #define MDCR_MCCD_BIT (ULL(1) << 34)

View file

@ -775,13 +775,6 @@ static void manage_extensions_common(cpu_context_t *ctx)
*/ */
trf_enable(ctx); trf_enable(ctx);
} }
if (is_feat_brbe_supported()) {
/*
* Enable FEAT_BRBE for Non-Secure and prohibit for Secure state.
*/
brbe_enable(ctx);
}
#endif /* IMAGE_BL31 */ #endif /* IMAGE_BL31 */
} }
@ -807,6 +800,10 @@ static void manage_extensions_nonsecure(cpu_context_t *ctx)
debugv8p9_extended_bp_wp_enable(ctx); debugv8p9_extended_bp_wp_enable(ctx);
} }
if (is_feat_brbe_supported()) {
brbe_enable(ctx);
}
pmuv3_enable(ctx); pmuv3_enable(ctx);
#endif /* IMAGE_BL31 */ #endif /* IMAGE_BL31 */
} }

View file

@ -16,11 +16,13 @@ void brbe_enable(cpu_context_t *ctx)
/* /*
* MDCR_EL3.SBRBE = 0b01 * MDCR_EL3.SBRBE = 0b01
*
* Allows BRBE usage in non-secure world and prohibited in * Allows BRBE usage in non-secure world and prohibited in
* secure world. * secure world.
*
* MDCR_EL3.{E3BREW, E3BREC} = 0b00
* Branch recording at EL3 is disabled
*/ */
mdcr_el3_val &= ~(MDCR_SBRBE_MASK << MDCR_SBRBE_SHIFT); mdcr_el3_val &= ~((MDCR_SBRBE_MASK << MDCR_SBRBE_SHIFT) | MDCR_E3BREW | MDCR_E3BREC);
mdcr_el3_val |= (0x1UL << MDCR_SBRBE_SHIFT); mdcr_el3_val |= (0x1UL << MDCR_SBRBE_SHIFT);
write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val); write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
} }