fix(brbe): allow RME builds with BRBE

It used to be the case that a FEAT_RME build could not be built with
FEAT_BRBE support. BRBE doesn't have a 3-world aware disable and
MDCR_EL3 was not context switched to allow for disabling in Realm world.

As of commit 123002f917 MDCR_EL3 is
context switched. Since the flag for BRBE support is
ENABLE_BRBE_FOR_NS, move brbe_enable() to only happen for NS world. The
other worlds will see BRBE disabled and branch recording prohibited.
This allows for a build with both RME and BRBE.

Note that EL2 BRBE registers are not context switched. Further work is
needed if non-NS support is required.

Change-Id: I82f0f08399dcd080902477dc9636bc4541685f89
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
This commit is contained in:
Boyan Karatotev 2024-10-18 11:02:54 +01:00
parent 742d0e6ef3
commit 9890eab574
4 changed files with 10 additions and 17 deletions

View file

@ -597,19 +597,11 @@ endif #(SUPPORT_STACK_MEMTAG)
################################################################################
# FEAT_RME
ifeq (${ENABLE_RME},1)
# RME doesn't support BRBE
ENABLE_BRBE_FOR_NS := 0
# RME doesn't support PIE
ifneq (${ENABLE_PIE},0)
$(error ENABLE_RME does not support PIE)
endif
# RME doesn't support BRBE
ifneq (${ENABLE_BRBE_FOR_NS},0)
$(error ENABLE_RME does not support BRBE.)
endif
# RME requires AARCH64
ifneq (${ARCH},aarch64)
$(error ENABLE_RME requires AArch64)

View file

@ -623,6 +623,8 @@
/* MDCR_EL3 definitions */
#define MDCR_EBWE_BIT (ULL(1) << 43)
#define MDCR_E3BREC (ULL(1) << 38)
#define MDCR_E3BREW (ULL(1) << 37)
#define MDCR_EnPMSN_BIT (ULL(1) << 36)
#define MDCR_MPMX_BIT (ULL(1) << 35)
#define MDCR_MCCD_BIT (ULL(1) << 34)

View file

@ -760,13 +760,6 @@ static void manage_extensions_common(cpu_context_t *ctx)
*/
trf_enable(ctx);
}
if (is_feat_brbe_supported()) {
/*
* Enable FEAT_BRBE for Non-Secure and prohibit for Secure state.
*/
brbe_enable(ctx);
}
#endif /* IMAGE_BL31 */
}
@ -792,6 +785,10 @@ static void manage_extensions_nonsecure(cpu_context_t *ctx)
debugv8p9_extended_bp_wp_enable(ctx);
}
if (is_feat_brbe_supported()) {
brbe_enable(ctx);
}
pmuv3_enable(ctx);
#endif /* IMAGE_BL31 */
}

View file

@ -16,11 +16,13 @@ void brbe_enable(cpu_context_t *ctx)
/*
* MDCR_EL3.SBRBE = 0b01
*
* Allows BRBE usage in non-secure world and prohibited in
* secure world.
*
* MDCR_EL3.{E3BREW, E3BREC} = 0b00
* Branch recording at EL3 is disabled
*/
mdcr_el3_val &= ~(MDCR_SBRBE_MASK << MDCR_SBRBE_SHIFT);
mdcr_el3_val &= ~((MDCR_SBRBE_MASK << MDCR_SBRBE_SHIFT) | MDCR_E3BREW | MDCR_E3BREC);
mdcr_el3_val |= (0x1UL << MDCR_SBRBE_SHIFT);
write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
}