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plat/sgi: allow access to nor2 flash and system registers from s-el0
Allow the access of system registers and nor2 flash memory region from s-el0. This allows the secure parititions residing at s-el0 to access these memory regions. Signed-off-by: Thomas Abraham <thomas.abraham@arm.com> Change-Id: I3887a86770de806323fbde0d20fdc96eec6e0c3c
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4 changed files with 41 additions and 3 deletions
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@ -32,7 +32,7 @@
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# if SPM_MM
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# define PLAT_ARM_MMAP_ENTRIES 9
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# define MAX_XLAT_TABLES 7
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# define PLAT_SP_IMAGE_MMAP_REGIONS 7
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# define PLAT_SP_IMAGE_MMAP_REGIONS 9
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# define PLAT_SP_IMAGE_MAX_XLAT_TABLES 10
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# else
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# define PLAT_ARM_MMAP_ENTRIES (5 + ((CSS_SGI_CHIP_COUNT - 1) * 3))
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -12,4 +12,22 @@
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#include <plat/arm/board/common/v2m_def.h>
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#include <plat/arm/soc/common/soc_css_def.h>
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/* Map the System registers to access from S-EL0 */
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#define CSS_SYSTEMREG_DEVICE_BASE (0x1C010000)
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#define CSS_SYSTEMREG_DEVICE_SIZE (0x00010000)
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#define PLAT_ARM_SECURE_MAP_SYSTEMREG MAP_REGION_FLAT( \
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CSS_SYSTEMREG_DEVICE_BASE, \
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CSS_SYSTEMREG_DEVICE_SIZE, \
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(MT_DEVICE | MT_RW | \
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MT_SECURE | MT_USER))
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/* Map the NOR2 Flash to access from S-EL0 */
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#define CSS_NOR2_FLASH_DEVICE_BASE (0x10000000)
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#define CSS_NOR2_FLASH_DEVICE_SIZE (0x04000000)
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#define PLAT_ARM_SECURE_MAP_NOR2 MAP_REGION_FLAT( \
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CSS_NOR2_FLASH_DEVICE_BASE, \
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CSS_NOR2_FLASH_DEVICE_SIZE, \
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(MT_DEVICE | MT_RW | \
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MT_SECURE | MT_USER))
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#endif /* SGI_SOC_PLATFORM_DEF_H */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -10,4 +10,22 @@
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#include <sgi_base_platform_def.h>
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#include <sgi_soc_css_def_v2.h>
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/* Map the System registers to access from S-EL0 */
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#define CSS_SYSTEMREG_DEVICE_BASE (0x0C010000)
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#define CSS_SYSTEMREG_DEVICE_SIZE (0x00010000)
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#define PLAT_ARM_SECURE_MAP_SYSTEMREG MAP_REGION_FLAT( \
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CSS_SYSTEMREG_DEVICE_BASE, \
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CSS_SYSTEMREG_DEVICE_SIZE, \
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(MT_DEVICE | MT_RW | \
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MT_SECURE | MT_USER))
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/* Map the NOR2 Flash to access from S-EL0 */
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#define CSS_NOR2_FLASH_DEVICE_BASE (0x001054000000)
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#define CSS_NOR2_FLASH_DEVICE_SIZE (0x000004000000)
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#define PLAT_ARM_SECURE_MAP_NOR2 MAP_REGION_FLAT( \
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CSS_NOR2_FLASH_DEVICE_BASE, \
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CSS_NOR2_FLASH_DEVICE_SIZE, \
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(MT_DEVICE | MT_RW | \
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MT_SECURE | MT_USER))
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#endif /* SGI_SOC_PLATFORM_DEF_V2_H */
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@ -78,6 +78,8 @@ const mmap_region_t plat_arm_mmap[] = {
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#if SPM_MM && defined(IMAGE_BL31)
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const mmap_region_t plat_arm_secure_partition_mmap[] = {
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PLAT_ARM_SECURE_MAP_SYSTEMREG,
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PLAT_ARM_SECURE_MAP_NOR2,
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PLAT_ARM_SECURE_MAP_DEVICE,
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ARM_SP_IMAGE_MMAP,
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ARM_SP_IMAGE_NS_BUF_MMAP,
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