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Update ULL() macro and instances of ull to comply with MISRA
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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parent
322a98b632
commit
5724481fdd
17 changed files with 26 additions and 26 deletions
docs
include
lib
plat
arm/board/fvp/drivers/pwrc
hisilicon
mediatek
qemu/include
rockchip
xilinx/zynqmp/include
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@ -459,19 +459,19 @@ constants must also be defined:
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- **#define : ADDR\_SPACE\_SIZE**
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- **#define : ADDR\_SPACE\_SIZE**
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Defines the total size of the address space in bytes. For example, for a 32
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Defines the total size of the address space in bytes. For example, for a 32
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bit address space, this value should be ``(1ull << 32)``. This definition is
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bit address space, this value should be ``(1ULL << 32)``. This definition is
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now deprecated, platforms should use ``PLAT_PHY_ADDR_SPACE_SIZE`` and
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now deprecated, platforms should use ``PLAT_PHY_ADDR_SPACE_SIZE`` and
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``PLAT_VIRT_ADDR_SPACE_SIZE`` instead.
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``PLAT_VIRT_ADDR_SPACE_SIZE`` instead.
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- **#define : PLAT\_VIRT\_ADDR\_SPACE\_SIZE**
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- **#define : PLAT\_VIRT\_ADDR\_SPACE\_SIZE**
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Defines the total size of the virtual address space in bytes. For example,
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Defines the total size of the virtual address space in bytes. For example,
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for a 32 bit virtual address space, this value should be ``(1ull << 32)``.
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for a 32 bit virtual address space, this value should be ``(1ULL << 32)``.
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- **#define : PLAT\_PHY\_ADDR\_SPACE\_SIZE**
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- **#define : PLAT\_PHY\_ADDR\_SPACE\_SIZE**
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Defines the total size of the physical address space in bytes. For example,
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Defines the total size of the physical address space in bytes. For example,
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for a 32 bit physical address space, this value should be ``(1ull << 32)``.
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for a 32 bit physical address space, this value should be ``(1ULL << 32)``.
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If the platform port uses the IO storage framework, the following constants
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If the platform port uses the IO storage framework, the following constants
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must also be defined:
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must also be defined:
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@ -80,8 +80,8 @@
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# define U(_x) (_x)
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# define U(_x) (_x)
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# define ULL(_x) (_x)
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# define ULL(_x) (_x)
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#else
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#else
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# define U(_x) (_x##u)
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# define U(_x) (_x##U)
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# define ULL(_x) (_x##ull)
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# define ULL(_x) (_x##ULL)
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#endif
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#endif
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/* Register size of the current architecture. */
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/* Register size of the current architecture. */
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@ -279,11 +279,11 @@
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* AArch64 builds
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* AArch64 builds
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*/
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*/
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#ifdef AARCH64
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#ifdef AARCH64
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 36)
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 36)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 36)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 36)
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#else
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#else
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
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#endif
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#endif
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@ -31,7 +31,7 @@
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#define debug_print(...) ((void)0)
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#define debug_print(...) ((void)0)
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#endif
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#endif
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#define UNSET_DESC ~0ull
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#define UNSET_DESC ~0ULL
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static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
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static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
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__aligned(XLAT_TABLE_SIZE) __section("xlat_table");
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__aligned(XLAT_TABLE_SIZE) __section("xlat_table");
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@ -22,7 +22,7 @@
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unsigned long long xlat_arch_get_max_supported_pa(void)
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unsigned long long xlat_arch_get_max_supported_pa(void)
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{
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{
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/* Physical address space size for long descriptor format. */
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/* Physical address space size for long descriptor format. */
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return (1ull << 40) - 1ull;
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return (1ULL << 40) - 1ULL;
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}
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}
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#endif /* ENABLE_ASSERTIONS*/
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#endif /* ENABLE_ASSERTIONS*/
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@ -62,7 +62,7 @@ unsigned long long xlat_arch_get_max_supported_pa(void)
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/* All other values are reserved */
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/* All other values are reserved */
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assert(pa_range < ARRAY_SIZE(pa_range_bits_arr));
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assert(pa_range < ARRAY_SIZE(pa_range_bits_arr));
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return (1ull << pa_range_bits_arr[pa_range]) - 1ull;
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return (1ULL << pa_range_bits_arr[pa_range]) - 1ULL;
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}
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}
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#endif /* ENABLE_ASSERTIONS*/
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#endif /* ENABLE_ASSERTIONS*/
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@ -14,7 +14,7 @@
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#define PWKUPR_OFF 0xc
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#define PWKUPR_OFF 0xc
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#define PSYSR_OFF 0x10
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#define PSYSR_OFF 0x10
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#define PWKUPR_WEN (1ull << 31)
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#define PWKUPR_WEN (1ULL << 31)
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#define PSYSR_AFF_L2 (1 << 31)
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#define PSYSR_AFF_L2 (1 << 31)
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#define PSYSR_AFF_L1 (1 << 30)
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#define PSYSR_AFF_L1 (1 << 30)
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@ -149,7 +149,7 @@
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/*
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/*
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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*/
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*/
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#if defined(IMAGE_BL1) || defined(IMAGE_BL32)
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#if defined(IMAGE_BL1) || defined(IMAGE_BL32)
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#define MAX_XLAT_TABLES 3
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#define MAX_XLAT_TABLES 3
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@ -114,7 +114,7 @@
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/*
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/*
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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*/
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*/
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || defined(IMAGE_BL32)
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#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || defined(IMAGE_BL32)
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#define MAX_XLAT_TABLES 3
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#define MAX_XLAT_TABLES 3
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@ -122,7 +122,7 @@
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#define PLAT_POPLAR_NS_IMAGE_OFFSET 0x37000000
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#define PLAT_POPLAR_NS_IMAGE_OFFSET 0x37000000
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/* Page table and MMU setup constants */
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/* Page table and MMU setup constants */
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_XLAT_TABLES (4)
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#define MAX_XLAT_TABLES (4)
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#define MAX_MMAP_REGIONS (16)
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#define MAX_MMAP_REGIONS (16)
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@ -196,7 +196,7 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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******************************************************************************/
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_XLAT_TABLES 7
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#define MAX_XLAT_TABLES 7
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#define MAX_MMAP_REGIONS 16
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#define MAX_MMAP_REGIONS 16
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@ -96,8 +96,8 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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******************************************************************************/
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_XLAT_TABLES 4
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#define MAX_XLAT_TABLES 4
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#define MAX_MMAP_REGIONS 16
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#define MAX_MMAP_REGIONS 16
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@ -166,8 +166,8 @@
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#define NS_IMAGE_OFFSET 0x60000000
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#define NS_IMAGE_OFFSET 0x60000000
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_MMAP_REGIONS 8
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#define MAX_MMAP_REGIONS 8
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#define MAX_XLAT_TABLES 6
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#define MAX_XLAT_TABLES 6
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#define MAX_IO_DEVICES 3
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#define MAX_IO_DEVICES 3
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@ -85,7 +85,7 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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******************************************************************************/
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_XLAT_TABLES 9
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#define MAX_XLAT_TABLES 9
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#define MAX_MMAP_REGIONS 33
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#define MAX_MMAP_REGIONS 33
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@ -85,7 +85,7 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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******************************************************************************/
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_XLAT_TABLES 8
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#define MAX_XLAT_TABLES 8
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#define MAX_MMAP_REGIONS 16
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#define MAX_MMAP_REGIONS 16
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@ -68,7 +68,7 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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******************************************************************************/
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#define ADDR_SPACE_SIZE (1ull << 32)
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#define ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_XLAT_TABLES 20
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#define MAX_XLAT_TABLES 20
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#define MAX_MMAP_REGIONS 25
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#define MAX_MMAP_REGIONS 25
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@ -76,8 +76,8 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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******************************************************************************/
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
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#define MAX_MMAP_REGIONS 7
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#define MAX_MMAP_REGIONS 7
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#define MAX_XLAT_TABLES 5
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#define MAX_XLAT_TABLES 5
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