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fix(security): add support in cpu_ops for CVE-2024-7881
This patch adds new cpu ops function extra4 and a new macro for CVE-2024-7881 [1]. This new macro declare_cpu_ops_wa_4 allows support for new CVE check function. [1]: https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-7881 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I417389f040c6ead7f96f9b720d29061833f43d37
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2 changed files with 23 additions and 6 deletions
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@ -63,6 +63,10 @@
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* This is a placeholder for future per CPU operations. Currently,
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* some CPUs use this entry to set a test function to determine if
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* the workaround for CVE-2022-23960 needs to be applied or not.
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* _extra4:
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* This is a placeholder for future per CPU operations. Currently,
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* some CPUs use this entry to set a test function to determine if
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* the workaround for CVE-2024-7881 needs to be applied or not.
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* _e_handler:
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* This is a placeholder for future per CPU exception handlers.
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* _power_down_ops:
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@ -75,7 +79,8 @@
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* used to handle power down at subsequent levels
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*/
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.macro declare_cpu_ops_base _name:req, _midr:req, _resetfunc:req, \
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_extra1:req, _extra2:req, _extra3:req, _e_handler:req, _power_down_ops:vararg
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_extra1:req, _extra2:req, _extra3:req, _extra4:req, \
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_e_handler:req, _power_down_ops:vararg
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.section .cpu_ops, "a"
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.align 3
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.type cpu_ops_\_name, %object
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@ -86,6 +91,7 @@
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.quad \_extra1
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.quad \_extra2
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.quad \_extra3
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.quad \_extra4
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.quad \_e_handler
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#ifdef IMAGE_BL31
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/* Insert list of functions */
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@ -148,21 +154,28 @@
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.macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \
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_power_down_ops:vararg
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declare_cpu_ops_base \_name, \_midr, \_resetfunc, 0, 0, 0, 0, \
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declare_cpu_ops_base \_name, \_midr, \_resetfunc, 0, 0, 0, 0, 0, \
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\_power_down_ops
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.endm
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.macro declare_cpu_ops_eh _name:req, _midr:req, _resetfunc:req, \
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_e_handler:req, _power_down_ops:vararg
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declare_cpu_ops_base \_name, \_midr, \_resetfunc, \
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0, 0, 0, \_e_handler, \_power_down_ops
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0, 0, 0, 0, \_e_handler, \_power_down_ops
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.endm
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.macro declare_cpu_ops_wa _name:req, _midr:req, \
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_resetfunc:req, _extra1:req, _extra2:req, \
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_extra3:req, _power_down_ops:vararg
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declare_cpu_ops_base \_name, \_midr, \_resetfunc, \
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\_extra1, \_extra2, \_extra3, 0, \_power_down_ops
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\_extra1, \_extra2, \_extra3, 0, 0, \_power_down_ops
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.endm
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.macro declare_cpu_ops_wa_4 _name:req, _midr:req, \
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_resetfunc:req, _extra1:req, _extra2:req, \
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_extra3:req, _extra4:req, _power_down_ops:vararg
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declare_cpu_ops_base \_name, \_midr, \_resetfunc, \
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\_extra1, \_extra2, \_extra3, \_extra4, 0, \_power_down_ops
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.endm
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/*
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2023-2025, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -28,6 +28,7 @@
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#define CPU_NO_EXTRA1_FUNC 0
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#define CPU_NO_EXTRA2_FUNC 0
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#define CPU_NO_EXTRA3_FUNC 0
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#define CPU_NO_EXTRA4_FUNC 0
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#endif /* __aarch64__ */
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@ -45,6 +46,7 @@
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#define CPU_EXTRA1_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_EXTRA2_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_EXTRA3_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_EXTRA4_FUNC_SIZE CPU_WORD_SIZE
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#define CPU_E_HANDLER_FUNC_SIZE CPU_WORD_SIZE
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/* The power down core and cluster is needed only in BL31 and BL32 */
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#if defined(IMAGE_BL31) || defined(IMAGE_BL32)
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@ -89,7 +91,8 @@
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#define CPU_EXTRA1_FUNC CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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#define CPU_EXTRA2_FUNC CPU_EXTRA1_FUNC + CPU_EXTRA1_FUNC_SIZE
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#define CPU_EXTRA3_FUNC CPU_EXTRA2_FUNC + CPU_EXTRA2_FUNC_SIZE
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#define CPU_E_HANDLER_FUNC CPU_EXTRA3_FUNC + CPU_EXTRA3_FUNC_SIZE
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#define CPU_EXTRA4_FUNC CPU_EXTRA3_FUNC + CPU_EXTRA3_FUNC_SIZE
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#define CPU_E_HANDLER_FUNC CPU_EXTRA4_FUNC + CPU_EXTRA4_FUNC_SIZE
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#define CPU_PWR_DWN_OPS CPU_E_HANDLER_FUNC + CPU_E_HANDLER_FUNC_SIZE
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#else
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#define CPU_PWR_DWN_OPS CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
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@ -119,6 +122,7 @@ struct cpu_ops {
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void (*extra1_func)(void);
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void (*extra2_func)(void);
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void (*extra3_func)(void);
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void (*extra4_func)(void);
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void (*e_handler_func)(long es);
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#endif /* __aarch64__ */
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#if (defined(IMAGE_BL31) || defined(IMAGE_BL32)) && CPU_MAX_PWR_DWN_OPS
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