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feat(cpus): add errata framework helpers

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Adding an helper macro for bit field insert(bic) instruction
to group all the operations related to it.

Change-Id: Idfd06c7f38faf52090f62b458d2d96c2682f63fe
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
This commit is contained in:
Jayanth Dodderi Chidanand 2023-06-19 16:20:02 +01:00
parent 5d1751066d
commit 445f7b5191
1 changed files with 14 additions and 1 deletions
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15
include/lib/cpus/aarch64/cpu_macros.S
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2023, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -443,6 +443,19 @@
msr vbar_el3, x1
.endm
/*
* BFI : Inserts bitfield into a system register.
*
* BFI{cond} Rd, Rn, #lsb, #width
*/
.macro sysreg_bitfield_insert _reg:req, _src:req, _lsb:req, _width:req
/* Source value for BFI */
mov x1, #\_src
mrs x0, \_reg
bfi x0, x1, #\_lsb, #\_width
msr \_reg, x0
.endm
/*
* Apply erratum
*