From 445f7b5191992c760e1089f566b94473a0432a1e Mon Sep 17 00:00:00 2001 From: Jayanth Dodderi Chidanand Date: Mon, 19 Jun 2023 16:20:02 +0100 Subject: [PATCH] feat(cpus): add errata framework helpers Adding an helper macro for bit field insert(bic) instruction to group all the operations related to it. Change-Id: Idfd06c7f38faf52090f62b458d2d96c2682f63fe Signed-off-by: Jayanth Dodderi Chidanand --- include/lib/cpus/aarch64/cpu_macros.S | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S index 404b7f91b..d945d7c84 100644 --- a/include/lib/cpus/aarch64/cpu_macros.S +++ b/include/lib/cpus/aarch64/cpu_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2023, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -443,6 +443,19 @@ msr vbar_el3, x1 .endm +/* + * BFI : Inserts bitfield into a system register. + * + * BFI{cond} Rd, Rn, #lsb, #width + */ +.macro sysreg_bitfield_insert _reg:req, _src:req, _lsb:req, _width:req + /* Source value for BFI */ + mov x1, #\_src + mrs x0, \_reg + bfi x0, x1, #\_lsb, #\_width + msr \_reg, x0 +.endm + /* * Apply erratum *