mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-19 02:54:24 +00:00
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition management in TF-A. One is based on the "Management Mode" (MM) design, the other is based on the Secure Partition Client Interface (SPCI) specification. Currently there is a dependency between their build flags that shouldn't exist, making further development harder than it should be. This patch removes that dependency, making the two flags function independently. Before: ENABLE_SPM=1 is required for using either implementation. By default, the SPCI-based implementation is enabled and this is overridden if SPM_MM=1. After: ENABLE_SPM=1 enables the SPCI-based implementation. SPM_MM=1 enables the MM-based implementation. The two build flags are mutually exclusive. Note that the name of the ENABLE_SPM flag remains a bit ambiguous - this will be improved in a subsequent patch. For this patch the intention was to leave the name as-is so that it is easier to track the changes that were made. Change-Id: I8e64ee545d811c7000f27e8dc8ebb977d670608a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
This commit is contained in:
parent
b8e17967bb
commit
3f3c341ae5
18 changed files with 59 additions and 51 deletions
8
Makefile
8
Makefile
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@ -571,6 +571,14 @@ ifeq ($(CTX_INCLUDE_MTE_REGS),1)
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endif
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endif
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endif
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endif
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# The SPCI-based SPM implementation and the MM-based SPM implementation cannot
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# be enabled at the same time.
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ifeq ($(ENABLE_SPM),1)
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ifeq ($(SPM_MM),1)
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$(error Use only one of the ENABLE_SPM and SPM_MM flags)
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endif
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endif
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################################################################################
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################################################################################
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# Process platform overrideable behaviour
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# Process platform overrideable behaviour
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################################################################################
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################################################################################
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@ -142,7 +142,7 @@ SECTIONS
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ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
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ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
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"cpu_ops not defined for this platform.")
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"cpu_ops not defined for this platform.")
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#if ENABLE_SPM
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#if ENABLE_SPM || SPM_MM
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#ifndef SPM_SHIM_EXCEPTIONS_VMA
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#ifndef SPM_SHIM_EXCEPTIONS_VMA
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#define SPM_SHIM_EXCEPTIONS_VMA RAM
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#define SPM_SHIM_EXCEPTIONS_VMA RAM
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#endif
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#endif
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20
bl31/bl31.mk
20
bl31/bl31.mk
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@ -5,21 +5,21 @@
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#
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#
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################################################################################
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################################################################################
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# Include SPM Makefile
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# Include Makefile for either of the supported SPM implementations
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################################################################################
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################################################################################
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ifeq (${ENABLE_SPM},1)
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ifeq (${ENABLE_SPM},1)
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ifeq (${SPM_MM},1)
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$(info Including SPM (SPCI) makefile)
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ifeq (${EL3_EXCEPTION_HANDLING},0)
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$(error EL3_EXCEPTION_HANDLING must be 1 for SPM support)
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endif
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$(info Including makefile of SPM based on MM)
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include services/std_svc/spm_mm/spm.mk
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else
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$(info Including SPM makefile)
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include services/std_svc/spm/spm.mk
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include services/std_svc/spm/spm.mk
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endif
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endif
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endif
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ifeq (${SPM_MM},1)
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ifeq (${EL3_EXCEPTION_HANDLING},0)
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$(error EL3_EXCEPTION_HANDLING must be 1 for SPM support)
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else
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$(info Including SPM Management Mode (MM) makefile)
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include services/std_svc/spm_mm/spm.mk
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endif
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endif
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include lib/psci/psci_lib.mk
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include lib/psci/psci_lib.mk
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@ -235,8 +235,9 @@ Common build options
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The default is 1 but is automatically disabled when the target architecture
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The default is 1 but is automatically disabled when the target architecture
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is AArch32.
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is AArch32.
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- ``ENABLE_SPM`` : Boolean option to enable the Secure Partition Manager (SPM).
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- ``ENABLE_SPM`` : Boolean option to enable the SPCI-based Secure Partition
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Refer to :ref:`Secure Partition Manager` for more details about
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Manager (SPM) implementation.
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Refer to the :ref:`Secure Partition Manager` guide for more details about
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this feature. Default is 0.
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this feature. Default is 0.
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- ``ENABLE_SVE_FOR_NS``: Boolean option to enable Scalable Vector Extension
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- ``ENABLE_SVE_FOR_NS``: Boolean option to enable Scalable Vector Extension
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@ -507,6 +508,9 @@ Common build options
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firmware images have been loaded in memory, and the MMU and caches are
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firmware images have been loaded in memory, and the MMU and caches are
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turned off. Refer to the "Debugging options" section for more details.
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turned off. Refer to the "Debugging options" section for more details.
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- ``SPM_MM`` : Boolean option to enable the Management Mode (MM)-based Secure
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Partition Manager (SPM) implementation. The default value is ``0``.
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- ``SP_MIN_WITH_SECURE_FIQ``: Boolean flag to indicate the SP_MIN handles
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- ``SP_MIN_WITH_SECURE_FIQ``: Boolean flag to indicate the SP_MIN handles
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secure interrupts (caught through the FIQ line). Platforms can enable
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secure interrupts (caught through the FIQ line). Platforms can enable
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this directive if they need to handle such interruption. When enabled,
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this directive if they need to handle such interruption. When enabled,
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@ -500,9 +500,9 @@
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* SPD and no SPM, as they are the only ones that can be used as BL32.
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* SPD and no SPM, as they are the only ones that can be used as BL32.
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*/
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*/
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#if defined(__aarch64__) && !JUNO_AARCH32_EL3_RUNTIME
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#if defined(__aarch64__) && !JUNO_AARCH32_EL3_RUNTIME
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# if defined(SPD_none) && !ENABLE_SPM
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# if defined(SPD_none) && !ENABLE_SPM && !SPM_MM
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# undef BL32_BASE
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# undef BL32_BASE
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# endif /* defined(SPD_none) && !ENABLE_SPM */
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# endif /* defined(SPD_none) && !ENABLE_SPM && !SPM_MM*/
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#endif /* defined(__aarch64__) && !JUNO_AARCH32_EL3_RUNTIME */
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#endif /* defined(__aarch64__) && !JUNO_AARCH32_EL3_RUNTIME */
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/*******************************************************************************
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/*******************************************************************************
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@ -38,7 +38,7 @@ typedef struct arm_tzc_regions_info {
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* - Region 1 with secure access only;
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* - Region 1 with secure access only;
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* - the remaining DRAM regions access from the given Non-Secure masters.
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* - the remaining DRAM regions access from the given Non-Secure masters.
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******************************************************************************/
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******************************************************************************/
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#if ENABLE_SPM && SPM_MM
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#if SPM_MM
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#define ARM_TZC_REGIONS_DEF \
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#define ARM_TZC_REGIONS_DEF \
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{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
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{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
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TZC_REGION_S_RDWR, 0}, \
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TZC_REGION_S_RDWR, 0}, \
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@ -178,11 +178,11 @@ RECLAIM_INIT_CODE := 0
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# SPD choice
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# SPD choice
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SPD := none
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SPD := none
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# For including the Secure Partition Manager
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# Enable the SPCI-based Secure Partition Manager implementation
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ENABLE_SPM := 0
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ENABLE_SPM := 0
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# Use the SPM based on MM
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# Enable the Management Mode (MM)-based Secure Partition Manager implementation
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SPM_MM := 1
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SPM_MM := 0
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# Flag to introduce an infinite loop in BL1 just before it exits into the next
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# Flag to introduce an infinite loop in BL1 just before it exits into the next
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# image. This is meant to help debugging the post-BL2 phase.
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# image. This is meant to help debugging the post-BL2 phase.
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@ -96,10 +96,10 @@ const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_BL1_RW,
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ARM_MAP_BL1_RW,
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#endif
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#endif
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#endif /* TRUSTED_BOARD_BOOT */
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#endif /* TRUSTED_BOARD_BOOT */
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#if ENABLE_SPM && SPM_MM
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#if SPM_MM
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ARM_SP_IMAGE_MMAP,
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ARM_SP_IMAGE_MMAP,
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#endif
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#endif
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#if ENABLE_SPM && !SPM_MM
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#if ENABLE_SPM
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PLAT_MAP_SP_PACKAGE_MEM_RW,
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PLAT_MAP_SP_PACKAGE_MEM_RW,
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#endif
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#endif
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#if ARM_BL31_IN_DRAM
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#if ARM_BL31_IN_DRAM
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@ -127,16 +127,16 @@ const mmap_region_t plat_arm_mmap[] = {
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MAP_DEVICE0,
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MAP_DEVICE0,
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MAP_DEVICE1,
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MAP_DEVICE1,
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ARM_V2M_MAP_MEM_PROTECT,
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ARM_V2M_MAP_MEM_PROTECT,
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#if ENABLE_SPM && SPM_MM
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#if SPM_MM
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ARM_SPM_BUF_EL3_MMAP,
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ARM_SPM_BUF_EL3_MMAP,
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#endif
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#endif
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#if ENABLE_SPM && !SPM_MM
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#if ENABLE_SPM
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PLAT_MAP_SP_PACKAGE_MEM_RO,
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PLAT_MAP_SP_PACKAGE_MEM_RO,
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#endif
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#endif
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{0}
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{0}
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};
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};
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#if ENABLE_SPM && defined(IMAGE_BL31) && SPM_MM
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#if defined(IMAGE_BL31) && SPM_MM
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const mmap_region_t plat_arm_secure_partition_mmap[] = {
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const mmap_region_t plat_arm_secure_partition_mmap[] = {
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V2M_MAP_IOFPGA_EL0, /* for the UART */
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V2M_MAP_IOFPGA_EL0, /* for the UART */
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MAP_REGION_FLAT(DEVICE0_BASE, \
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MAP_REGION_FLAT(DEVICE0_BASE, \
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@ -190,7 +190,7 @@ static unsigned int get_interconnect_master(void)
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}
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}
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#endif
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#endif
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#if ENABLE_SPM && defined(IMAGE_BL31) && SPM_MM
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#if defined(IMAGE_BL31) && SPM_MM
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/*
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/*
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* Boot information passed to a secure partition during initialisation. Linear
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* Boot information passed to a secure partition during initialisation. Linear
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* indices in MP information will be filled at runtime.
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* indices in MP information will be filled at runtime.
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* plat_arm_mmap array defined for each BL stage.
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* plat_arm_mmap array defined for each BL stage.
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*/
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*/
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#if defined(IMAGE_BL31)
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#if defined(IMAGE_BL31)
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# if ENABLE_SPM
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# if ENABLE_SPM || SPM_MM
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# define PLAT_ARM_MMAP_ENTRIES 9
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# define PLAT_ARM_MMAP_ENTRIES 9
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# define MAX_XLAT_TABLES 9
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# define MAX_XLAT_TABLES 9
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# define PLAT_SP_IMAGE_MMAP_REGIONS 30
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# define PLAT_SP_IMAGE_MMAP_REGIONS 30
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@ -116,7 +116,7 @@
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* calculated using the current BL31 PROGBITS debug size plus the sizes of
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* calculated using the current BL31 PROGBITS debug size plus the sizes of
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* BL2 and BL1-RW
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* BL2 and BL1-RW
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*/
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*/
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#if ENABLE_SPM && !SPM_MM
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#if ENABLE_SPM
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#define PLAT_ARM_MAX_BL31_SIZE UL(0x60000)
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#define PLAT_ARM_MAX_BL31_SIZE UL(0x60000)
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#else
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#else
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#define PLAT_ARM_MAX_BL31_SIZE UL(0x3B000)
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#define PLAT_ARM_MAX_BL31_SIZE UL(0x3B000)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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endif
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ifeq (${ENABLE_SPM},1)
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ifeq (${ENABLE_SPM},1)
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ifeq (${SPM_MM},0)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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endif
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endif
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ifeq (${SPD},trusty)
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ifeq (${SPD},trusty)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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endif
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -24,7 +24,7 @@ ehf_pri_desc_t arm_exceptions[] = {
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/* Normal priority SDEI */
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/* Normal priority SDEI */
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EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
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EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
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#endif
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#endif
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#if ENABLE_SPM
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#if ENABLE_SPM || SPM_MM
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EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SP_PRI),
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EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SP_PRI),
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#endif
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#endif
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};
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};
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@ -249,14 +249,12 @@ PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \
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endif
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endif
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# SPM uses libfdt in Arm platforms
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# SPM uses libfdt in Arm platforms
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ifeq (${SPM_MM},0)
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ifeq (${ENABLE_SPM},1)
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ifeq (${ENABLE_SPM},1)
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BL31_SOURCES += common/fdt_wrappers.c \
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BL31_SOURCES += common/fdt_wrappers.c \
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plat/common/plat_spm_rd.c \
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plat/common/plat_spm_rd.c \
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plat/common/plat_spm_sp.c \
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plat/common/plat_spm_sp.c \
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${LIBFDT_SRCS}
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${LIBFDT_SRCS}
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endif
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endif
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endif
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ifneq (${TRUSTED_BOARD_BOOT},0)
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ifneq (${TRUSTED_BOARD_BOOT},0)
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -28,7 +28,7 @@
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* plat_arm_mmap array defined for each BL stage.
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* plat_arm_mmap array defined for each BL stage.
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*/
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*/
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#if defined(IMAGE_BL31)
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#if defined(IMAGE_BL31)
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# if ENABLE_SPM
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# if ENABLE_SPM || SPM_MM
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# define PLAT_ARM_MMAP_ENTRIES 9
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# define PLAT_ARM_MMAP_ENTRIES 9
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# define MAX_XLAT_TABLES 7
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# define MAX_XLAT_TABLES 7
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# define PLAT_SP_IMAGE_MMAP_REGIONS 7
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# define PLAT_SP_IMAGE_MMAP_REGIONS 7
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@ -101,7 +101,7 @@
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#elif defined(IMAGE_BL2U)
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#elif defined(IMAGE_BL2U)
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# define PLATFORM_STACK_SIZE 0x400
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# define PLATFORM_STACK_SIZE 0x400
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#elif defined(IMAGE_BL31)
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#elif defined(IMAGE_BL31)
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# if ENABLE_SPM
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# if ENABLE_SPM || SPM_MM
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# define PLATFORM_STACK_SIZE 0x500
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# define PLATFORM_STACK_SIZE 0x500
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# else
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# else
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# define PLATFORM_STACK_SIZE 0x400
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# define PLATFORM_STACK_SIZE 0x400
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -46,7 +46,7 @@ const mmap_region_t plat_arm_mmap[] = {
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#if ARM_BL31_IN_DRAM
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#if ARM_BL31_IN_DRAM
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ARM_MAP_BL31_SEC_DRAM,
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ARM_MAP_BL31_SEC_DRAM,
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#endif
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#endif
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#if ENABLE_SPM
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#if SPM_MM
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ARM_SP_IMAGE_MMAP,
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ARM_SP_IMAGE_MMAP,
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#endif
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#endif
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#if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
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#if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
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@ -61,13 +61,13 @@ const mmap_region_t plat_arm_mmap[] = {
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V2M_MAP_IOFPGA,
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V2M_MAP_IOFPGA,
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CSS_SGI_MAP_DEVICE,
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CSS_SGI_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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#if ENABLE_SPM
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#if SPM_MM
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ARM_SPM_BUF_EL3_MMAP,
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ARM_SPM_BUF_EL3_MMAP,
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#endif
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#endif
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{0}
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{0}
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};
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};
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#if ENABLE_SPM && defined(IMAGE_BL31)
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#if SPM_MM && defined(IMAGE_BL31)
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const mmap_region_t plat_arm_secure_partition_mmap[] = {
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const mmap_region_t plat_arm_secure_partition_mmap[] = {
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PLAT_ARM_SECURE_MAP_DEVICE,
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PLAT_ARM_SECURE_MAP_DEVICE,
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ARM_SP_IMAGE_MMAP,
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ARM_SP_IMAGE_MMAP,
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@ -77,12 +77,12 @@ const mmap_region_t plat_arm_secure_partition_mmap[] = {
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ARM_SPM_BUF_EL0_MMAP,
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ARM_SPM_BUF_EL0_MMAP,
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{0}
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{0}
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};
|
};
|
||||||
#endif /* ENABLE_SPM && defined(IMAGE_BL31) */
|
#endif /* SPM_MM && defined(IMAGE_BL31) */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
ARM_CASSERT_MMAP
|
ARM_CASSERT_MMAP
|
||||||
|
|
||||||
#if ENABLE_SPM && defined(IMAGE_BL31)
|
#if SPM_MM && defined(IMAGE_BL31)
|
||||||
/*
|
/*
|
||||||
* Boot information passed to a secure partition during initialisation. Linear
|
* Boot information passed to a secure partition during initialisation. Linear
|
||||||
* indices in MP information will be filled at runtime.
|
* indices in MP information will be filled at runtime.
|
||||||
|
@ -130,7 +130,7 @@ const struct secure_partition_boot_info *plat_get_secure_partition_boot_info(
|
||||||
{
|
{
|
||||||
return &plat_arm_secure_partition_boot_info;
|
return &plat_arm_secure_partition_boot_info;
|
||||||
}
|
}
|
||||||
#endif /* ENABLE_SPM && defined(IMAGE_BL31) */
|
#endif /* SPM_MM && defined(IMAGE_BL31) */
|
||||||
|
|
||||||
#if TRUSTED_BOARD_BOOT
|
#if TRUSTED_BOARD_BOOT
|
||||||
int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
|
int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
|
||||||
|
|
|
@ -95,7 +95,7 @@ LR_RO_DATA +0
|
||||||
/* cpu_ops must always be defined */
|
/* cpu_ops must always be defined */
|
||||||
ScatterAssert(ImageLength(__CPU_OPS__) > 0)
|
ScatterAssert(ImageLength(__CPU_OPS__) > 0)
|
||||||
|
|
||||||
#if ENABLE_SPM
|
#if ENABLE_SPM || SPM_MM
|
||||||
LR_SPM +0
|
LR_SPM +0
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
#
|
#
|
||||||
# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
|
# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
|
||||||
#
|
#
|
||||||
# SPDX-License-Identifier: BSD-3-Clause
|
# SPDX-License-Identifier: BSD-3-Clause
|
||||||
#
|
#
|
||||||
|
@ -57,7 +57,7 @@ BL31_SOURCES += $(PLAT_PATH)/drivers/scp/sq_scmi.c \
|
||||||
drivers/arm/css/mhu/css_mhu_doorbell.c
|
drivers/arm/css/mhu/css_mhu_doorbell.c
|
||||||
endif
|
endif
|
||||||
|
|
||||||
ifeq (${ENABLE_SPM},1)
|
ifeq (${SPM_MM},1)
|
||||||
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
|
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
|
||||||
|
|
||||||
BL31_SOURCES += $(PLAT_PATH)/sq_spm.c
|
BL31_SOURCES += $(PLAT_PATH)/sq_spm.c
|
||||||
|
|
|
@ -159,7 +159,7 @@ void bl31_plat_runtime_setup(void)
|
||||||
void bl31_plat_arch_setup(void)
|
void bl31_plat_arch_setup(void)
|
||||||
{
|
{
|
||||||
static const mmap_region_t secure_partition_mmap[] = {
|
static const mmap_region_t secure_partition_mmap[] = {
|
||||||
#if ENABLE_SPM && SPM_MM
|
#if SPM_MM
|
||||||
MAP_REGION_FLAT(PLAT_SPM_BUF_BASE,
|
MAP_REGION_FLAT(PLAT_SPM_BUF_BASE,
|
||||||
PLAT_SPM_BUF_SIZE,
|
PLAT_SPM_BUF_SIZE,
|
||||||
MT_RW_DATA | MT_SECURE),
|
MT_RW_DATA | MT_SECURE),
|
||||||
|
@ -173,7 +173,7 @@ void bl31_plat_arch_setup(void)
|
||||||
sq_mmap_setup(BL31_BASE, BL31_SIZE, secure_partition_mmap);
|
sq_mmap_setup(BL31_BASE, BL31_SIZE, secure_partition_mmap);
|
||||||
enable_mmu_el3(XLAT_TABLE_NC);
|
enable_mmu_el3(XLAT_TABLE_NC);
|
||||||
|
|
||||||
#if ENABLE_SPM && SPM_MM
|
#if SPM_MM
|
||||||
memcpy((void *)SPM_SHIM_EXCEPTIONS_START,
|
memcpy((void *)SPM_SHIM_EXCEPTIONS_START,
|
||||||
(void *)SPM_SHIM_EXCEPTIONS_LMA,
|
(void *)SPM_SHIM_EXCEPTIONS_LMA,
|
||||||
(uintptr_t)SPM_SHIM_EXCEPTIONS_END -
|
(uintptr_t)SPM_SHIM_EXCEPTIONS_END -
|
||||||
|
|
|
@ -45,7 +45,7 @@ static int32_t std_svc_setup(void)
|
||||||
ret = 1;
|
ret = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if ENABLE_SPM
|
#if ENABLE_SPM || SPM_MM
|
||||||
if (spm_setup() != 0) {
|
if (spm_setup() != 0) {
|
||||||
ret = 1;
|
ret = 1;
|
||||||
}
|
}
|
||||||
|
@ -103,7 +103,7 @@ static uintptr_t std_svc_smc_handler(uint32_t smc_fid,
|
||||||
SMC_RET1(handle, ret);
|
SMC_RET1(handle, ret);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if ENABLE_SPM && SPM_MM
|
#if SPM_MM
|
||||||
/*
|
/*
|
||||||
* Dispatch SPM calls to SPM SMC handler and return its return
|
* Dispatch SPM calls to SPM SMC handler and return its return
|
||||||
* value
|
* value
|
||||||
|
|
Loading…
Add table
Reference in a new issue