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build(intel): define a macro for SIMICS build
SIMICS builds have different UART configurations compared to hardware build. Hence, this patch defines a macro to differentiate between both. Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: Iadecd5445e06611486ac3c6a214a6d0dc8ccd27b
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parent
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commit
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5 changed files with 19 additions and 4 deletions
5
Makefile
5
Makefile
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@ -945,6 +945,9 @@ PRINT_MEMORY_MAP ?= ${PRINT_MEMORY_MAP_PATH}/print_memory_map.py
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# Variables for use with documentation build using Sphinx tool
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DOCS_PATH ?= docs
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# Defination of SIMICS flag
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SIMICS_BUILD ?= 0
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################################################################################
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# Include BL specific makefiles
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################################################################################
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@ -1055,6 +1058,7 @@ $(eval $(call assert_booleans,\
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ENABLE_FEAT_FGT \
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ENABLE_FEAT_AMUv1 \
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ENABLE_FEAT_ECV \
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SIMICS_BUILD \
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)))
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$(eval $(call assert_numerics,\
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@ -1172,6 +1176,7 @@ $(eval $(call add_defines,\
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ENABLE_FEAT_FGT \
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ENABLE_FEAT_AMUv1 \
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ENABLE_FEAT_ECV \
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SIMICS_BUILD \
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)))
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ifeq (${SANITIZE_UB},trap)
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@ -1,6 +1,6 @@
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#
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# Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
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# Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2019-2022, Intel Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -73,4 +73,5 @@ PROGRAMMABLE_RESET_ADDRESS := 0
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BL2_AT_EL3 := 1
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BL2_INV_DCACHE := 0
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MULTI_CONSOLE_API := 1
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SIMICS_BUILD := 0
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USE_COHERENT_MEM := 1
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@ -169,9 +169,16 @@
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#define CRASH_CONSOLE_BASE PLAT_UART0_BASE
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#ifndef SIMICS_BUILD
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#define PLAT_BAUDRATE (115200)
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#define PLAT_UART_CLOCK (100000000)
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#else
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#define PLAT_BAUDRATE (4800)
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#define PLAT_UART_CLOCK (76800)
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#endif
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/*******************************************************************************
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* PHY related constants
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******************************************************************************/
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@ -46,4 +46,5 @@ PROGRAMMABLE_RESET_ADDRESS := 0
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BL2_AT_EL3 := 1
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BL2_INV_DCACHE := 0
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MULTI_CONSOLE_API := 1
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SIMICS_BUILD := 0
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USE_COHERENT_MEM := 1
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@ -1,6 +1,6 @@
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#
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# Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
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# Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2019-2022, Intel Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -69,4 +69,5 @@ BL31_SOURCES += \
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PROGRAMMABLE_RESET_ADDRESS := 0
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BL2_AT_EL3 := 1
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SIMICS_BUILD := 0
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USE_COHERENT_MEM := 1
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