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https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-13 16:14:20 +00:00
Remove all non-configurable dead loops
Added a new platform porting function plat_panic_handler, to allow platforms to handle unexpected error situations. It must be implemented in assembly as it may be called before the C environment is initialized. A default implementation is provided, which simply spins. Corrected all dead loops in generic code to call this function instead. This includes the dead loop that occurs at the end of the call to panic(). All unnecesary wfis from bl32/tsp/aarch64/tsp_exceptions.S have been removed. Change-Id: I67cb85f6112fa8e77bd62f5718efcef4173d8134
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parent
195d29f399
commit
1c3ea103d2
12 changed files with 92 additions and 59 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -43,8 +43,8 @@ func bl2_entrypoint
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* available to BL2 for future use.
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* x0 is not currently used.
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* ---------------------------------------------
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*/
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mov x20, x1
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*/
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mov x20, x1
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/* ---------------------------------------------
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* Set the exception vector to something sane.
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@ -126,6 +126,11 @@ func bl2_entrypoint
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* ---------------------------------------------
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*/
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bl bl2_main
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_panic:
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b _panic
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/* ---------------------------------------------
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* Should never reach this point.
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* ---------------------------------------------
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*/
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bl plat_panic_handler
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endfunc bl2_entrypoint
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -122,6 +122,10 @@ func bl2u_entrypoint
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*/
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bl bl2u_main
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_panic:
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b _panic
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/* ---------------------------------------------
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* Should never reach this point.
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* ---------------------------------------------
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*/
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bl plat_panic_handler
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endfunc bl2u_entrypoint
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -351,17 +351,17 @@ func do_crash_reporting
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plat_print_interconnect_regs
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/* Done reporting */
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b crash_panic
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bl plat_panic_handler
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endfunc do_crash_reporting
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#else /* CRASH_REPORTING */
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func report_unhandled_exception
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report_unhandled_interrupt:
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b crash_panic
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bl plat_panic_handler
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endfunc report_unhandled_exception
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#endif /* CRASH_REPORTING */
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func crash_panic
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b crash_panic
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endfunc crash_panic
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bl plat_panic_handler
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endfunc crash_panic
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -391,7 +391,7 @@ tsp_sel1_intr_return:
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/* Should never reach here */
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tsp_sel1_int_entry_panic:
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b tsp_sel1_int_entry_panic
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bl plat_panic_handler
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endfunc tsp_sel1_intr_entry
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/*---------------------------------------------
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@ -407,8 +407,9 @@ endfunc tsp_sel1_intr_entry
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func tsp_cpu_resume_entry
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bl tsp_cpu_resume_main
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restore_args_call_smc
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tsp_cpu_resume_panic:
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b tsp_cpu_resume_panic
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/* Should never reach here */
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bl plat_panic_handler
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endfunc tsp_cpu_resume_entry
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/*---------------------------------------------
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@ -419,8 +420,9 @@ endfunc tsp_cpu_resume_entry
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func tsp_fast_smc_entry
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bl tsp_smc_handler
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restore_args_call_smc
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tsp_fast_smc_entry_panic:
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b tsp_fast_smc_entry_panic
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/* Should never reach here */
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bl plat_panic_handler
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endfunc tsp_fast_smc_entry
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/*---------------------------------------------
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@ -435,6 +437,7 @@ func tsp_std_smc_entry
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bl tsp_smc_handler
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msr daifset, #DAIF_FIQ_BIT | DAIF_IRQ_BIT
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restore_args_call_smc
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tsp_std_smc_entry_panic:
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b tsp_std_smc_entry_panic
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/* Should never reach here */
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bl plat_panic_handler
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endfunc tsp_std_smc_entry
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -108,24 +108,23 @@ tsp_exceptions:
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* -----------------------------------------------------
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*/
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sync_exception_sp_el0:
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wfi
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b sync_exception_sp_el0
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bl plat_panic_handler
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check_vector_size sync_exception_sp_el0
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.align 7
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irq_sp_el0:
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b irq_sp_el0
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bl plat_panic_handler
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check_vector_size irq_sp_el0
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.align 7
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fiq_sp_el0:
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b fiq_sp_el0
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bl plat_panic_handler
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check_vector_size fiq_sp_el0
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.align 7
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serror_sp_el0:
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b serror_sp_el0
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bl plat_panic_handler
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check_vector_size serror_sp_el0
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@ -136,8 +135,7 @@ serror_sp_el0:
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*/
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.align 7
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sync_exception_sp_elx:
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wfi
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b sync_exception_sp_elx
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bl plat_panic_handler
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check_vector_size sync_exception_sp_elx
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.align 7
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@ -152,7 +150,7 @@ fiq_sp_elx:
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.align 7
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serror_sp_elx:
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b serror_sp_elx
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bl plat_panic_handler
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check_vector_size serror_sp_elx
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@ -163,23 +161,22 @@ serror_sp_elx:
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*/
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.align 7
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sync_exception_aarch64:
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wfi
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b sync_exception_aarch64
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bl plat_panic_handler
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check_vector_size sync_exception_aarch64
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.align 7
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irq_aarch64:
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b irq_aarch64
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bl plat_panic_handler
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check_vector_size irq_aarch64
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.align 7
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fiq_aarch64:
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b fiq_aarch64
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bl plat_panic_handler
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check_vector_size fiq_aarch64
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.align 7
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serror_aarch64:
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b serror_aarch64
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bl plat_panic_handler
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check_vector_size serror_aarch64
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@ -190,22 +187,21 @@ serror_aarch64:
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*/
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.align 7
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sync_exception_aarch32:
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wfi
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b sync_exception_aarch32
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bl plat_panic_handler
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check_vector_size sync_exception_aarch32
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.align 7
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irq_aarch32:
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b irq_aarch32
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bl plat_panic_handler
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check_vector_size irq_aarch32
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.align 7
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fiq_aarch32:
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b fiq_aarch32
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bl plat_panic_handler
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check_vector_size fiq_aarch32
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.align 7
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serror_aarch32:
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b serror_aarch32
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bl plat_panic_handler
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check_vector_size serror_aarch32
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.align 7
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -120,7 +120,7 @@ endfunc asm_print_str
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/*
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* This function prints a hexadecimal number in x4.
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* In: x4 = the hexadecimal to print.
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* Clobber: x30, x0, x5, x1, x2, x3
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* Clobber: x30, x0 - x3, x5
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*/
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func asm_print_hex
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mov x3, x30
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mov x6, x30
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bl plat_crash_console_init
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/* Check if the console is initialized */
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cbz x0, _panic_loop
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cbz x0, _panic_handler
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/* The console is initialized */
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adr x4, panic_msg
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bl asm_print_str
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/* The panic location is lr -4 */
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sub x4, x4, #4
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bl asm_print_hex
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_panic_loop:
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b _panic_loop
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endfunc do_panic
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_panic_handler:
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/* Pass to plat_panic_handler the address from where el3_panic was
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* called, not the address of the call from el3_panic. */
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mov x30,x6
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b plat_panic_handler
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endfunc do_panic
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The default implementation simply spins.
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### Function : plat_panic_handler()
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Argument : void
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Return : void
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This API is called when the generic code encounters an unexpected error
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situation from which it cannot recover. This function must not return,
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and must be implemented in assembly because it may be called before the C
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environment is initialized.
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Note: The address from where it was called is stored in x30 (Link Register).
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The default implementation simply spins.
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3. Modifications specific to a Boot Loader stage
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-------------------------------------------------
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/* This is a cold boot on a secondary CPU */
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bl plat_secondary_cold_boot_setup
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/* plat_secondary_cold_boot_setup() is not supposed to return */
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secondary_panic:
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b secondary_panic
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bl el3_panic
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do_primary_cold_boot:
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.endif /* _secondary_cold_boot */
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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int plat_crash_console_init(void);
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int plat_crash_console_putc(int c);
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void plat_error_handler(int err) __dead2;
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void plat_panic_handler(void) __dead2;
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/*******************************************************************************
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* Mandatory BL1 functions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*/
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dsb sy
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wfi
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cb_panic:
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b cb_panic
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bl plat_panic_handler
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#else
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mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
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*/
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mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
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ldr x0, [x0]
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cbz x0, _panic
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cbz x0, _panic_handler
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ret
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/* ---------------------------------------------------------------------
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* is empty. This should never happen!
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* ---------------------------------------------------------------------
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*/
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_panic:
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b _panic
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_panic_handler:
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bl plat_panic_handler
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endfunc plat_get_my_entrypoint
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/* -----------------------------------------------------
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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JUMP_TO_HANDLER_IF_JUNO_R(2)
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/* Board revision is not supported */
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not_supported:
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b not_supported
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bl plat_panic_handler
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endfunc plat_reset_handler
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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.weak plat_disable_acp
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.weak bl1_plat_prepare_exit
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.weak plat_error_handler
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.weak plat_panic_handler
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#if !ENABLE_PLAT_COMPAT
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.globl platform_get_core_pos
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func plat_error_handler
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b plat_error_handler
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endfunc plat_error_handler
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/* -----------------------------------------------------
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* void plat_panic_handler(void) __dead2;
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* Endless loop by default.
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* -----------------------------------------------------
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*/
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func plat_panic_handler
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b plat_panic_handler
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endfunc plat_panic_handler
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