Merge "refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED" into integration

This commit is contained in:
Manish Pandey 2023-04-25 18:09:29 +02:00 committed by TrustedFirmware Code Review
commit 0df3824b73
7 changed files with 49 additions and 25 deletions

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@ -263,7 +263,7 @@ smc_args_t *tsp_smc_handler(uint64_t func,
results[1] /= service_arg1 ? service_arg1 : 1; results[1] /= service_arg1 ? service_arg1 : 1;
break; break;
case TSP_CHECK_DIT: case TSP_CHECK_DIT:
if (!is_armv8_4_dit_present()) { if (!is_feat_dit_supported()) {
ERROR("DIT not supported\n"); ERROR("DIT not supported\n");
results[0] = 0; results[0] = 0;
results[1] = 0xffff; results[1] = 0xffff;

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@ -80,16 +80,6 @@ static void read_feat_pauth(void)
#endif #endif
} }
/************************************************************
* Feature : FEAT_DIT (Data Independent Timing Instructions)
***********************************************************/
static void read_feat_dit(void)
{
#if (ENABLE_FEAT_DIT == FEAT_STATE_ALWAYS)
feat_detect_panic(is_armv8_4_feat_dit_present(), "DIT");
#endif
}
/************************************************ /************************************************
* Feature : FEAT_MTE (Memory Tagging Extension) * Feature : FEAT_MTE (Memory Tagging Extension)
***********************************************/ ***********************************************/
@ -178,7 +168,7 @@ void detect_arch_features(void)
read_feat_pauth(); read_feat_pauth();
/* v8.4 features */ /* v8.4 features */
read_feat_dit(); check_feature(ENABLE_FEAT_DIT, read_feat_dit_id_field(), "DIT", 1, 1);
check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(), check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(),
"AMUv1", 1, 2); "AMUv1", 1, 2);
check_feature(ENABLE_MPAM_FOR_LOWER_ELS, read_feat_mpam_version(), check_feature(ENABLE_MPAM_FOR_LOWER_ELS, read_feat_mpam_version(),

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@ -92,6 +92,24 @@ static inline bool is_feat_sys_reg_trace_supported(void)
return read_feat_coptrc_id_field() != 0U; return read_feat_coptrc_id_field() != 0U;
} }
static inline unsigned int read_feat_dit_id_field(void)
{
return ISOLATE_FIELD(read_id_pfr0(), ID_PFR0_DIT);
}
static inline bool is_feat_dit_supported(void)
{
if (ENABLE_FEAT_DIT == FEAT_STATE_DISABLED) {
return false;
}
if (ENABLE_FEAT_DIT == FEAT_STATE_ALWAYS) {
return true;
}
return read_feat_dit_id_field() != 0U;
}
static inline bool is_feat_spe_supported(void) static inline bool is_feat_spe_supported(void)
{ {
/* FEAT_SPE is AArch64 only */ /* FEAT_SPE is AArch64 only */

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@ -89,12 +89,6 @@ static inline bool is_armv8_3_pauth_present(void)
is_feat_pacqarma3_present()); is_feat_pacqarma3_present());
} }
static inline bool is_armv8_4_dit_present(void)
{
return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
ID_AA64PFR0_DIT_MASK) == 1U;
}
static inline bool is_armv8_4_ttst_present(void) static inline bool is_armv8_4_ttst_present(void)
{ {
return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
@ -515,13 +509,22 @@ static inline bool is_armv8_2_feat_ras_present(void)
ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
} }
/************************************************************************** static unsigned int read_feat_dit_id_field(void)
* Function to identify the presence of FEAT_DIT (Data Independent Timing)
*************************************************************************/
static inline bool is_armv8_4_feat_dit_present(void)
{ {
return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_DIT);
ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED); }
static inline bool is_feat_dit_supported(void)
{
if (ENABLE_FEAT_DIT == FEAT_STATE_DISABLED) {
return false;
}
if (ENABLE_FEAT_DIT == FEAT_STATE_ALWAYS) {
return true;
}
return read_feat_dit_id_field() != 0U;
} }
static inline unsigned int read_feat_tracever_id_field(void) static inline unsigned int read_feat_tracever_id_field(void)

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@ -243,14 +243,20 @@
* register value for DIT. * register value for DIT.
*/ */
#if ENABLE_FEAT_DIT #if ENABLE_FEAT_DIT
#if ENABLE_ASSERTIONS #if ENABLE_ASSERTIONS || ENABLE_FEAT_DIT > 1
mrs x0, id_aa64pfr0_el1 mrs x0, id_aa64pfr0_el1
ubfx x0, x0, #ID_AA64PFR0_DIT_SHIFT, #ID_AA64PFR0_DIT_LENGTH ubfx x0, x0, #ID_AA64PFR0_DIT_SHIFT, #ID_AA64PFR0_DIT_LENGTH
#if ENABLE_FEAT_DIT > 1
cbz x0, 1f
#else
cmp x0, #ID_AA64PFR0_DIT_SUPPORTED cmp x0, #ID_AA64PFR0_DIT_SUPPORTED
ASM_ASSERT(eq) ASM_ASSERT(eq)
#endif
#endif /* ENABLE_ASSERTIONS */ #endif /* ENABLE_ASSERTIONS */
mov x0, #DIT_BIT mov x0, #DIT_BIT
msr DIT, x0 msr DIT, x0
1:
#endif #endif
.endm .endm

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@ -553,8 +553,14 @@ endfunc fpregs_context_restore
* always enable DIT in EL3 * always enable DIT in EL3
*/ */
#if ENABLE_FEAT_DIT #if ENABLE_FEAT_DIT
#if ENABLE_FEAT_DIT == 2
mrs x8, id_aa64pfr0_el1
and x8, x8, #(ID_AA64PFR0_DIT_MASK << ID_AA64PFR0_DIT_SHIFT)
cbz x8, 1f
#endif
mov x8, #DIT_BIT mov x8, #DIT_BIT
msr DIT, x8 msr DIT, x8
1:
#endif /* ENABLE_FEAT_DIT */ #endif /* ENABLE_FEAT_DIT */
.endm /* set_unset_pstate_bits */ .endm /* set_unset_pstate_bits */

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@ -70,6 +70,7 @@ endif
ENABLE_TRBE_FOR_NS := 2 ENABLE_TRBE_FOR_NS := 2
ENABLE_SYS_REG_TRACE_FOR_NS := 2 ENABLE_SYS_REG_TRACE_FOR_NS := 2
ENABLE_FEAT_CSV2_2 := 2 ENABLE_FEAT_CSV2_2 := 2
ENABLE_FEAT_DIT := 2
ENABLE_FEAT_PAN := 2 ENABLE_FEAT_PAN := 2
ENABLE_FEAT_VHE := 2 ENABLE_FEAT_VHE := 2
CTX_INCLUDE_NEVE_REGS := 2 CTX_INCLUDE_NEVE_REGS := 2