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build(ethos-n): add TZMP1 build flag
For the Arm(R) Ethos(TM)-N NPU Driver to support running inference with protected memory the TZC must be configured with appropriate regions. This is controlled in build time by the now added build flag. The new build flag is only supported with the Arm Juno platform and the TZC is configured with default memory regions as if TZMP1 wasn't enabled to facilitate adding the new memory regions later. Signed-off-by: Bjorn Engstrom <bjoern.engstroem@arm.com> Signed-off-by: Rob Hughes <robert.hughes@arm.com> Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I9dc49ac5d091cfbc8c20d7c3ab394a2836438b0f
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4 changed files with 41 additions and 4 deletions
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@ -101,6 +101,9 @@ Arm Platform Build Options
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the Arm Juno platform has this included in its ``HW_CONFIG`` and the platform
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only loads the ``HW_CONFIG`` in AArch64 builds. Default is 0.
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- ``ARM_ETHOSN_NPU_TZMP1``: boolean option to enable TZMP1 support for the
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Arm® Ethos™-N NPU. Requires ``ARM_ETHOSN_NPU_DRIVER`` to be enabled.
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- ``ARM_SPMC_MANIFEST_DTS`` : path to an alternate manifest file used as the
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SPMC Core manifest. Valid when ``SPD=spmd`` is selected.
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@ -165,4 +168,4 @@ Arm CSS Platform-Specific Build Options
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.. |FIP in a GPT image| image:: ../../resources/diagrams/FIP_in_a_GPT_image.png
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*Copyright (c) 2019-2021, Arm Limited. All rights reserved.*
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*Copyright (c) 2019-2023, Arm Limited. All rights reserved.*
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -78,6 +78,18 @@ static void init_v550(void)
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#endif /* JUNO_TZMP1 */
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#ifdef JUNO_ETHOSN_TZMP1
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/*
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* Currently use the default regions defined in ARM_TZC_REGIONS_DEF.
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* See the definition in /include/plat/arm/common/plat_arm.h
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*/
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static const arm_tzc_regions_info_t juno_ethosn_tzmp1_tzc_regions[] = {
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ARM_TZC_REGIONS_DEF, /* See define in /include/plat/arm/common/plat_arm.h */
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{},
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};
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#endif /* JUNO_ETHOSN_TZMP1 */
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/*******************************************************************************
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* Set up the MMU-401 SSD tables. The power-on configuration has all stream IDs
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* assigned to Non-Secure except some for the DMA-330. Assign those back to the
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@ -140,6 +152,9 @@ void plat_arm_security_setup(void)
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(void *)JUNO_AP_TZC_SHARE_DRAM1_BASE);
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INFO("TZC protected shared memory end address for TZMP usecase: %p\n",
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(void *)JUNO_AP_TZC_SHARE_DRAM1_END);
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#elif defined(JUNO_ETHOSN_TZMP1)
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arm_tzc400_setup(PLAT_ARM_TZC_BASE, juno_ethosn_tzmp1_tzc_regions);
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INFO("TZC set up with default settings for NPU TZMP usecase\n");
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#else
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arm_tzc400_setup(PLAT_ARM_TZC_BASE, NULL);
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#endif
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2013-2023, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -43,7 +43,11 @@ $(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
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JUNO_TZMP1 := 0
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$(eval $(call assert_boolean,JUNO_TZMP1))
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ifeq (${JUNO_TZMP1}, 1)
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$(eval $(call add_define,JUNO_TZMP1))
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ifeq (${ARM_ETHOSN_NPU_TZMP1},1)
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$(error JUNO_TZMP1 cannot be used together with ARM_ETHOSN_NPU_TZMP1)
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else
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$(eval $(call add_define,JUNO_TZMP1))
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endif
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endif
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TRNG_SUPPORT := 1
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@ -119,6 +119,21 @@ ARM_ETHOSN_NPU_DRIVER := 0
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$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER))
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$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER))
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# Arm(R) Ethos(TM)-N NPU TZMP1
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ARM_ETHOSN_NPU_TZMP1 := 0
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$(eval $(call assert_boolean,ARM_ETHOSN_NPU_TZMP1))
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$(eval $(call add_define,ARM_ETHOSN_NPU_TZMP1))
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ifeq (${ARM_ETHOSN_NPU_TZMP1},1)
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ifeq (${ARM_ETHOSN_NPU_DRIVER},0)
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$(error ARM_ETHOSN_NPU_TZMP1 is only available if ARM_ETHOSN_NPU_DRIVER=1)
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endif
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ifeq (${PLAT},juno)
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$(eval $(call add_define,JUNO_ETHOSN_TZMP1))
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else
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$(error ARM_ETHOSN_NPU_TZMP1 only supported on Juno platform, not ${PLAT})
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endif
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endif
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# Use an implementation of SHA-256 with a smaller memory footprint but reduced
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# speed.
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$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
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