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Merge "fix(fvp): work around BL31 progbits exceeded" into integration

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This commit is contained in:
Joanna Farley 2023-04-03 18:53:48 +02:00 • committed by TrustedFirmware Code Review
commit c38a17ed04
2 changed files with 55 additions and 48 deletions
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5
bl31/bl31.ld.S
View file

@ -132,7 +132,10 @@ SECTIONS {
RELA_SECTION >RAM
#ifdef BL31_PROGBITS_LIMIT
ASSERT(. <= BL31_PROGBITS_LIMIT, "BL31 progbits has exceeded its limit.")
ASSERT(
. <= BL31_PROGBITS_LIMIT,
"BL31 progbits has exceeded its limit. Consider disabling some features."
)
#endif /* BL31_PROGBITS_LIMIT */
#if SEPARATE_NOBITS_REGION

98
plat/arm/board/fvp/platform.mk
View file

@ -24,6 +24,57 @@ FVP_GICR_REGION_PROTECTION := 0
FVP_DT_PREFIX := fvp-base-gicv3-psci
# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
# progbits limit. We need a way to build all useful configurations while waiting
# on the fvp to increase its SRAM size. The problem is twofild:
# 1. the cleanup that introduced these enables cleaned up tf-a a little too
# well and things that previously (incorrectly) were enabled, no longer are.
# A bunch of CI configs build subtly incorrectly and this combo makes it
# necessary to forcefully and unconditionally enable them here.
# 2. the progbits limit is exceeded only when the tsp is involved. However,
# there are tsp CI configs that run on very high architecture revisions so
# disabling everything isn't an option.
# The fix is to enable everything, as before. When the tsp is included, though,
# we need to slim the size down. In that case, disable all optional features,
# that will not be present in CI when the tsp is.
# TODO: make all of this unconditional (or only base the condition on
# ARM_ARCH_* when the makefile supports it).
ifneq (${SPD}, tspd)
ENABLE_FEAT_AMU := 2
ENABLE_FEAT_AMUv1p1 := 2
ENABLE_FEAT_HCX := 2
ENABLE_MPAM_FOR_LOWER_ELS := 2
ENABLE_FEAT_RNG := 2
ENABLE_FEAT_TWED := 2
ifeq (${ARCH},aarch64)
ifeq (${SPM_MM}, 0)
ifeq (${ENABLE_RME}, 0)
ifeq (${CTX_INCLUDE_FPREGS}, 0)
ENABLE_SME_FOR_NS := 2
endif
endif
endif
endif
endif
# enable unconditionally for all builds
ifeq (${ARCH}, aarch64)
ifeq (${ENABLE_RME},0)
ENABLE_BRBE_FOR_NS := 2
endif
endif
ENABLE_TRBE_FOR_NS := 2
ENABLE_SYS_REG_TRACE_FOR_NS := 2
ENABLE_FEAT_CSV2_2 := 2
ENABLE_FEAT_PAN := 2
ENABLE_FEAT_VHE := 2
CTX_INCLUDE_NEVE_REGS := 2
ENABLE_FEAT_SEL2 := 2
ENABLE_TRF_FOR_NS := 2
ENABLE_FEAT_ECV := 2
ENABLE_FEAT_FGT := 2
ENABLE_FEAT_TCR2 := 2
# The FVP platform depends on this macro to build with correct GIC driver.
$(eval $(call add_define,FVP_USE_GIC_DRIVER))
@ -318,10 +369,6 @@ $(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
endif
# Enable Activity Monitor Unit extensions by default
ENABLE_FEAT_AMU := 2
ENABLE_FEAT_AMUv1p1 := 2
# Enable dynamic mitigation support by default
DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
@ -447,49 +494,6 @@ BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
DYN_DISABLE_AUTH := 1
endif
# enable trace buffer control registers access to NS by default
ENABLE_TRBE_FOR_NS := 2
# enable branch record buffer control registers access in NS by default
# only enable for aarch64
# do not enable when ENABLE_RME=1
ifeq (${ARCH}, aarch64)
ifeq (${ENABLE_RME},0)
ENABLE_BRBE_FOR_NS := 2
endif
endif
# enable trace system registers access to NS by default
ENABLE_SYS_REG_TRACE_FOR_NS := 2
# enable trace filter control registers access to NS by default
ENABLE_TRF_FOR_NS := 2
# Linux relies on EL3 enablement if those features are present
ENABLE_FEAT_FGT := 2
ENABLE_FEAT_HCX := 2
ENABLE_FEAT_TCR2 := 2
CTX_INCLUDE_NEVE_REGS := 2
ENABLE_FEAT_CSV2_2 := 2
ENABLE_FEAT_ECV := 2
ENABLE_FEAT_PAN := 2
ENABLE_FEAT_SEL2 := 2
ENABLE_FEAT_TWED := 2
ENABLE_FEAT_VHE := 2
ENABLE_MPAM_FOR_LOWER_ELS := 2
# Enable SME access to NS by default
ifeq (${ARCH},aarch64)
ifeq (${SPM_MM}, 0)
ifeq (${ENABLE_RME}, 0)
ifeq (${CTX_INCLUDE_FPREGS}, 0)
ENABLE_SME_FOR_NS := 2
endif
endif
endif
endif
ifeq (${SPMC_AT_EL3}, 1)
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
endif