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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "jc/refact_el1_ctx" into integration
* changes: feat(cm): enhance the cpu_context memory report refactor(cm): remove el1 context when SPMD_SPM_AT_SEL2=1
This commit is contained in:
Madhukar Pappireddy
TrustedFirmware Code Review
commit
021cdbfbd4
7 changed files with 166 additions and 75 deletions
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@ -7,8 +7,16 @@
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#ifndef CONTEXT_H
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#define CONTEXT_H
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#include <lib/el3_runtime/context_el1.h>
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#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
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#include <lib/el3_runtime/context_el2.h>
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#else
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/**
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* El1 context is required either when:
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* IMAGE_BL1 || ((!CTX_INCLUDE_EL2_REGS) && IMAGE_BL31)
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*/
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#include <lib/el3_runtime/context_el1.h>
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#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
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#include <lib/el3_runtime/cpu_data.h>
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#include <lib/el3_runtime/simd_ctx.h>
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#include <lib/utils_def.h>
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@ -250,10 +258,16 @@ typedef struct cpu_context {
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pauth_t pauth_ctx;
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#endif
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el1_sysregs_t el1_sysregs_ctx;
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#if CTX_INCLUDE_EL2_REGS
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#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
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el2_sysregs_t el2_sysregs_ctx;
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#else
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/* El1 context should be included only either for IMAGE_BL1,
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* or for IMAGE_BL31 when CTX_INCLUDE_EL2_REGS=0:
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* When SPMD_SPM_AT_SEL2=1, SPMC at S-EL2 takes care of saving
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* and restoring EL1 registers. In this case, BL31 at EL3 can
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* exclude save and restore of EL1 context registers.
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*/
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el1_sysregs_t el1_sysregs_ctx;
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#endif
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} cpu_context_t;
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@ -272,10 +286,13 @@ extern per_world_context_t per_world_context[CPU_DATA_CONTEXT_NUM];
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/* Macros to access members of the 'cpu_context_t' structure */
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#define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
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#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
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#define get_el2_sysregs_ctx(h) (&((cpu_context_t *) h)->el2_sysregs_ctx)
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#else
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#define get_el1_sysregs_ctx(h) (&((cpu_context_t *) h)->el1_sysregs_ctx)
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#if CTX_INCLUDE_EL2_REGS
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# define get_el2_sysregs_ctx(h) (&((cpu_context_t *) h)->el2_sysregs_ctx)
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#endif
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#define get_gpregs_ctx(h) (&((cpu_context_t *) h)->gpregs_ctx)
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#define get_cve_2018_3639_ctx(h) (&((cpu_context_t *) h)->cve_2018_3639_ctx)
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@ -356,6 +373,27 @@ void fpregs_context_save(simd_regs_t *regs);
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void fpregs_context_restore(simd_regs_t *regs);
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#endif
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/*******************************************************************************
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* The next four inline functions are required for IMAGE_BL1, as well as for
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* IMAGE_BL31 for the below combinations.
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* ============================================================================
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* | ERRATA_SPECULATIVE_AT| CTX_INCLUDE_EL2_REGS | Combination |
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* ============================================================================
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* | 0 | 0 | Valid (EL1 ctx) |
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* |______________________|______________________|____________________________|
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* | | | Invalid (No Errata/EL1 Ctx)|
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* | 0 | 1 | Hence commented out. |
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* |______________________|______________________|____________________________|
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* | | | |
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* | 1 | 0 | Valid (Errata ctx) |
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* |______________________|______________________|____________________________|
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* | | | |
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* | 1 | 1 | Valid (Errata ctx) |
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* |______________________|______________________|____________________________|
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* ============================================================================
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******************************************************************************/
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#if (IMAGE_BL1 || ((ERRATA_SPECULATIVE_AT) || (!CTX_INCLUDE_EL2_REGS)))
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static inline void write_ctx_sctlr_el1_reg_errata(cpu_context_t *ctx, u_register_t val)
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{
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#if (ERRATA_SPECULATIVE_AT)
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@ -396,6 +434,8 @@ static inline u_register_t read_ctx_tcr_el1_reg_errata(cpu_context_t *ctx)
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#endif /* ERRATA_SPECULATIVE_AT */
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}
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#endif /* (IMAGE_BL1 || ((ERRATA_SPECULATIVE_AT) || (!CTX_INCLUDE_EL2_REGS))) */
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#endif /* __ASSEMBLER__ */
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#endif /* CONTEXT_H */
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@ -13,7 +13,6 @@
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* AArch64 EL2 system register context structure for preserving the
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* architectural state during world switches.
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******************************************************************************/
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#if CTX_INCLUDE_EL2_REGS
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typedef struct el2_common_regs {
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uint64_t actlr_el2;
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uint64_t afsr0_el2;
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@ -359,7 +358,6 @@ typedef struct el2_sysregs {
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#define write_el2_ctx_mpam(ctx, reg, val)
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#endif /* CTX_INCLUDE_MPAM_REGS */
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#endif /* CTX_INCLUDE_EL2_REGS */
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/******************************************************************************/
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#endif /* __ASSEMBLER__ */
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@ -47,13 +47,14 @@ void cm_el3_arch_init_per_world(per_world_context_t *per_world_ctx);
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void cm_handle_asymmetric_features(void);
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#endif
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#if CTX_INCLUDE_EL2_REGS
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#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
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void cm_el2_sysregs_context_save(uint32_t security_state);
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void cm_el2_sysregs_context_restore(uint32_t security_state);
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#endif
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#else
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void cm_el1_sysregs_context_save(uint32_t security_state);
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void cm_el1_sysregs_context_restore(uint32_t security_state);
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#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
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void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint);
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void cm_set_elr_spsr_el3(uint32_t security_state,
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uintptr_t entrypoint, uint32_t spsr);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2023, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -28,19 +28,11 @@ static const char *get_context_name_by_idx(unsigned int security_state_idx)
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return state_names[security_state_idx];
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}
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#if CTX_INCLUDE_EL2_REGS
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#define PRINT_MEM_USAGE_SEPARATOR() \
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do { \
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printf("+-----------+-----------+-----------" \
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"+-----------+-----------+-----------+\n"); \
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} while (false)
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#else
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#define PRINT_MEM_USAGE_SEPARATOR() \
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do { \
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printf("+-----------+-----------" \
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"+-----------+-----------+-----------+\n"); \
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} while (false)
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#endif /* CTX_INCLUDE_EL2_REGS */
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#define NAME_PLACEHOLDER_LEN 14
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@ -49,6 +41,11 @@ static const char *get_context_name_by_idx(unsigned int security_state_idx)
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putchar('-'); \
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}
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#define PRINT_SINGLE_MEM_USAGE_SEP_BLOCK() \
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do { \
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printf("+-----------"); \
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} while (false)
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/********************************************************************************
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* This function prints the allocated memory for a specific security state.
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* Values are grouped by exception level and core. The memory usage for the
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@ -57,64 +54,119 @@ static const char *get_context_name_by_idx(unsigned int security_state_idx)
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static size_t report_allocated_memory(unsigned int security_state_idx)
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{
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size_t core_total = 0U;
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size_t gp_total = 0U;
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size_t el3_total = 0U;
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#if CTX_INCLUDE_EL2_REGS
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size_t el2_total = 0U;
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#endif /* CTX_INCLUDE_EL2_REGS */
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size_t el1_total = 0U;
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size_t other_total = 0U;
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size_t total = 0U;
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size_t per_world_ctx_size = 0U;
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#if CTX_INCLUDE_EL2_REGS
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size_t el2_total = 0U;
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#else
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size_t el1_total = 0U;
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#endif /* CTX_INCLUDE_EL2_REGS */
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#if CTX_INCLUDE_PAUTH_REGS
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size_t pauth_total = 0U;
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PRINT_SINGLE_MEM_USAGE_SEP_BLOCK();
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#endif
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PRINT_MEM_USAGE_SEPARATOR();
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printf("| Core | EL3 ");
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printf("| Core | GP | EL3 ");
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#if CTX_INCLUDE_EL2_REGS
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printf("| EL2 ");
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#else
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printf("| EL1 ");
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#endif /* CTX_INCLUDE_EL2_REGS */
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printf("| EL1 | Other | Total |\n");
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#if CTX_INCLUDE_PAUTH_REGS
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printf("| PAUTH ");
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#endif
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printf("| Other | Total |\n");
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/* Compute memory usage for each core's context */
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for (unsigned int i = 0U; i < PLATFORM_CORE_COUNT; i++) {
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size_t size_other = 0U;
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size_t el3_size = 0U;
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size_t gp_size = 0U;
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#if CTX_INCLUDE_EL2_REGS
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size_t el2_size = 0U;
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#endif /* CTX_INCLUDE_EL2_REGS */
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#else
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size_t el1_size = 0U;
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#endif /* CTX_INCLUDE_EL2_REGS */
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#if CTX_INCLUDE_PAUTH_REGS
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size_t pauth_size = 0U;
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PRINT_SINGLE_MEM_USAGE_SEP_BLOCK();
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#endif
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PRINT_MEM_USAGE_SEPARATOR();
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cpu_context_t *ctx = (cpu_context_t *)cm_get_context_by_index(i,
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security_state_idx);
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core_total = sizeof(*ctx);
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el3_size = sizeof(ctx->el3state_ctx);
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gp_size = sizeof(ctx->gpregs_ctx);
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size_other = core_total - (el3_size + gp_size);
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printf("| %9u | %8luB | %8luB ", i, gp_size, el3_size);
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#if CTX_INCLUDE_EL2_REGS
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el2_size = sizeof(ctx->el2_sysregs_ctx);
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#endif /* CTX_INCLUDE_EL2_REGS */
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el1_size = sizeof(ctx->el1_sysregs_ctx);
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size_other = core_total - el3_size - el1_size;
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printf("| %9u | %8luB ", i, el3_size);
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#if CTX_INCLUDE_EL2_REGS
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size_other -= el2_size;
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printf("| %8luB ", el2_size);
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#endif /* CTX_INCLUDE_EL2_REGS */
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printf("| %8luB | %8luB | %8luB |\n", el1_size, size_other, core_total);
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el3_total += el3_size;
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#if CTX_INCLUDE_EL2_REGS
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el2_total += el2_size;
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#endif /* CTX_INCLUDE_EL2_REGS */
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printf("| %8luB ", el2_size);
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#else
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el1_size = sizeof(ctx->el1_sysregs_ctx);
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size_other -= el1_size;
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el1_total += el1_size;
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printf("| %8luB ", el1_size);
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#endif /* CTX_INCLUDE_EL2_REGS */
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#if CTX_INCLUDE_PAUTH_REGS
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pauth_size = sizeof(ctx->pauth_ctx);
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size_other -= pauth_size;
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pauth_total += pauth_size;
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printf("| %8luB ", pauth_size);
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#endif
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printf("| %8luB | %8luB |\n", size_other, core_total);
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gp_total += gp_size;
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el3_total += el3_size;
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other_total += size_other;
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total += core_total;
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}
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#if CTX_INCLUDE_PAUTH_REGS
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PRINT_SINGLE_MEM_USAGE_SEP_BLOCK();
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#endif
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PRINT_MEM_USAGE_SEPARATOR();
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#if CTX_INCLUDE_PAUTH_REGS
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PRINT_SINGLE_MEM_USAGE_SEP_BLOCK();
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#endif
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PRINT_MEM_USAGE_SEPARATOR();
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printf("| All | %8luB ", el3_total);
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printf("| All | %8luB | %8luB ", gp_total, el3_total);
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#if CTX_INCLUDE_EL2_REGS
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printf("| %8luB ", el2_total);
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#else
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printf("| %8luB ", el1_total);
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#endif /* CTX_INCLUDE_EL2_REGS */
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printf("| %8luB | %8luB | %8luB |\n", el1_total, other_total, total);
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#if CTX_INCLUDE_PAUTH_REGS
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printf("| %8luB ", pauth_total);
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#endif
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printf("| %8luB | %8luB |\n", other_total, total);
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#if CTX_INCLUDE_PAUTH_REGS
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PRINT_SINGLE_MEM_USAGE_SEP_BLOCK();
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#endif
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PRINT_MEM_USAGE_SEPARATOR();
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printf("\n");
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@ -146,18 +198,10 @@ void report_ctx_memory_usage(void)
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printf("Memory usage for %s:\n", context_name);
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total += report_allocated_memory(i);
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printf("------------------------"
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#if CTX_INCLUDE_EL2_REGS
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"------"
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#endif /* CTX_INCLUDE_EL2_REGS */
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);
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printf("------------------------");
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len = NAME_PLACEHOLDER_LEN - printf("End %s", context_name);
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PRINT_DASH(len);
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printf(
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#if CTX_INCLUDE_EL2_REGS
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"------"
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#endif /* CTX_INCLUDE_EL2_REGS */
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"-----------------------\n\n");
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printf("-----------------------\n\n");
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}
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printf("Total context memory allocated: %luB\n\n", total);
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@ -51,6 +51,7 @@ static void manage_extensions_nonsecure(cpu_context_t *ctx);
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static void manage_extensions_secure(cpu_context_t *ctx);
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static void manage_extensions_secure_per_world(void);
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#if ((IMAGE_BL1) || (IMAGE_BL31 && (!CTX_INCLUDE_EL2_REGS)))
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static void setup_el1_context(cpu_context_t *ctx, const struct entry_point_info *ep)
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{
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u_register_t sctlr_elx, actlr_elx;
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@ -108,6 +109,7 @@ static void setup_el1_context(cpu_context_t *ctx, const struct entry_point_info
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actlr_elx = read_actlr_el1();
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write_el1_ctx_common(get_el1_sysregs_ctx(ctx), actlr_el1, actlr_elx);
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}
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#endif /* (IMAGE_BL1) || (IMAGE_BL31 && (!CTX_INCLUDE_EL2_REGS)) */
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/******************************************************************************
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* This function performs initializations that are specific to SECURE state
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@ -140,7 +142,7 @@ static void setup_secure_context(cpu_context_t *ctx, const struct entry_point_in
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* Initialize EL1 context registers unless SPMC is running
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* at S-EL2.
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*/
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#if !SPMD_SPM_AT_SEL2
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#if (!SPMD_SPM_AT_SEL2)
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setup_el1_context(ctx, ep);
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#endif
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@ -156,7 +158,6 @@ static void setup_secure_context(cpu_context_t *ctx, const struct entry_point_in
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if (!has_secure_perworld_init) {
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manage_extensions_secure_per_world();
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}
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}
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#if ENABLE_RME
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@ -260,11 +261,8 @@ static void setup_ns_context(cpu_context_t *ctx, const struct entry_point_info *
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#endif
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write_ctx_reg(state, CTX_SCR_EL3, scr_el3);
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/* Initialize EL1 context registers */
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setup_el1_context(ctx, ep);
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/* Initialize EL2 context registers */
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#if CTX_INCLUDE_EL2_REGS
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#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
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/*
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* Initialize SCTLR_EL2 context register with reset value.
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@ -297,8 +295,10 @@ static void setup_ns_context(cpu_context_t *ctx, const struct entry_point_info *
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write_el2_ctx_fgt(get_el2_sysregs_ctx(ctx), hfgwtr_el2,
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HFGWTR_EL2_INIT_VAL);
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}
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#endif /* CTX_INCLUDE_EL2_REGS */
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#else
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/* Initialize EL1 context registers */
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setup_el1_context(ctx, ep);
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#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
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manage_extensions_nonsecure(ctx);
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}
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|
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@ -329,7 +329,7 @@ static void setup_context_common(cpu_context_t *ctx, const entry_point_info_t *e
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* to boot correctly. However, there are very few registers where this
|
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* is not true and some values need to be recreated.
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*/
|
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#if CTX_INCLUDE_EL2_REGS
|
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#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
|
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el2_sysregs_t *el2_ctx = get_el2_sysregs_ctx(ctx);
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/*
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@ -345,7 +345,7 @@ static void setup_context_common(cpu_context_t *ctx, const entry_point_info_t *e
|
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* and it may contain access control bits (e.g. CLUSTERPMUEN bit).
|
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*/
|
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write_el2_ctx_common(el2_ctx, actlr_el2, read_actlr_el2());
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#endif /* CTX_INCLUDE_EL2_REGS */
|
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#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
|
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|
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/* Start with a clean SCR_EL3 copy as all relevant values are set */
|
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scr_el3 = SCR_RESET_VAL;
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||||
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@ -1087,11 +1087,14 @@ void cm_prepare_el3_exit(uint32_t security_state)
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}
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}
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}
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#if (!CTX_INCLUDE_EL2_REGS)
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/* Restore EL1 system registers, only when CTX_INCLUDE_EL2_REGS=0 */
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cm_el1_sysregs_context_restore(security_state);
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#endif
|
||||
cm_set_next_eret_context(security_state);
|
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}
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||||
|
||||
#if CTX_INCLUDE_EL2_REGS
|
||||
#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
|
||||
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||||
static void el2_sysregs_context_save_fgt(el2_sysregs_t *ctx)
|
||||
{
|
||||
|
|
@ -1519,7 +1522,7 @@ void cm_el2_sysregs_context_restore(uint32_t security_state)
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write_gcspr_el2(read_el2_ctx_gcs(el2_sysregs_ctx, gcspr_el2));
|
||||
}
|
||||
}
|
||||
#endif /* CTX_INCLUDE_EL2_REGS */
|
||||
#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
|
||||
|
||||
#if IMAGE_BL31
|
||||
/*********************************************************************************
|
||||
|
|
@ -1580,7 +1583,7 @@ void cm_prepare_el3_exit_ns(void)
|
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cm_handle_asymmetric_features();
|
||||
#endif
|
||||
|
||||
#if CTX_INCLUDE_EL2_REGS
|
||||
#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
|
||||
#if ENABLE_ASSERTIONS
|
||||
cpu_context_t *ctx = cm_get_context(NON_SECURE);
|
||||
assert(ctx != NULL);
|
||||
|
|
@ -1591,15 +1594,19 @@ void cm_prepare_el3_exit_ns(void)
|
|||
(el_implemented(2U) != EL_IMPL_NONE));
|
||||
#endif /* ENABLE_ASSERTIONS */
|
||||
|
||||
/* Restore EL2 and EL1 sysreg contexts */
|
||||
/* Restore EL2 sysreg contexts */
|
||||
cm_el2_sysregs_context_restore(NON_SECURE);
|
||||
cm_el1_sysregs_context_restore(NON_SECURE);
|
||||
cm_set_next_eret_context(NON_SECURE);
|
||||
#else
|
||||
cm_prepare_el3_exit(NON_SECURE);
|
||||
#endif /* CTX_INCLUDE_EL2_REGS */
|
||||
#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
|
||||
}
|
||||
|
||||
#if ((IMAGE_BL1) || (IMAGE_BL31 && (!CTX_INCLUDE_EL2_REGS)))
|
||||
/*******************************************************************************
|
||||
* The next set of six functions are used by runtime services to save and restore
|
||||
* EL1 context on the 'cpu_context' structure for the specified security state.
|
||||
******************************************************************************/
|
||||
static void el1_sysregs_context_save(el1_sysregs_t *ctx)
|
||||
{
|
||||
write_el1_ctx_common(ctx, spsr_el1, read_spsr_el1());
|
||||
|
|
@ -1791,9 +1798,8 @@ static void el1_sysregs_context_restore(el1_sysregs_t *ctx)
|
|||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* The next four functions are used by runtime services to save and restore
|
||||
* EL1 context on the 'cpu_context' structure for the specified security
|
||||
* state.
|
||||
* The next couple of functions are used by runtime services to save and restore
|
||||
* EL1 context on the 'cpu_context' structure for the specified security state.
|
||||
******************************************************************************/
|
||||
void cm_el1_sysregs_context_save(uint32_t security_state)
|
||||
{
|
||||
|
|
@ -1829,6 +1835,8 @@ void cm_el1_sysregs_context_restore(uint32_t security_state)
|
|||
#endif
|
||||
}
|
||||
|
||||
#endif /* ((IMAGE_BL1) || (IMAGE_BL31 && (!CTX_INCLUDE_EL2_REGS))) */
|
||||
|
||||
/*******************************************************************************
|
||||
* This function populates ELR_EL3 member of 'cpu_context' pertaining to the
|
||||
* given security state with the given entrypoint
|
||||
|
|
|
|||
|
|
@ -23,13 +23,13 @@ static u_register_t init_mdcr_el2_hpmn(u_register_t mdcr_el2)
|
|||
|
||||
void pmuv3_enable(cpu_context_t *ctx)
|
||||
{
|
||||
#if CTX_INCLUDE_EL2_REGS
|
||||
#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
|
||||
u_register_t mdcr_el2_val;
|
||||
|
||||
mdcr_el2_val = read_el2_ctx_common(get_el2_sysregs_ctx(ctx), mdcr_el2);
|
||||
mdcr_el2_val = init_mdcr_el2_hpmn(mdcr_el2_val);
|
||||
write_el2_ctx_common(get_el2_sysregs_ctx(ctx), mdcr_el2, mdcr_el2_val);
|
||||
#endif /* CTX_INCLUDE_EL2_REGS */
|
||||
#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
|
||||
}
|
||||
|
||||
static u_register_t mtpmu_disable_el3(u_register_t mdcr_el3)
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ static void populate_cpu_err_data(cpu_err_info *cpu_info,
|
|||
cpu_info->ErrCtxEl1Reg[16] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),
|
||||
ttbr1_el1);
|
||||
|
||||
#if CTX_INCLUDE_EL2_REGS
|
||||
#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
|
||||
cpu_info->ErrCtxEl2Reg[0] = read_el2_ctx_common(get_el2_sysregs_ctx(ctx),
|
||||
elr_el2);
|
||||
cpu_info->ErrCtxEl2Reg[1] = read_el2_ctx_common(get_el2_sysregs_ctx(ctx),
|
||||
|
|
@ -125,7 +125,7 @@ static void populate_cpu_err_data(cpu_err_info *cpu_info,
|
|||
vttbr_el2);
|
||||
cpu_info->ErrCtxEl2Reg[15] = read_el2_ctx_common(get_el2_sysregs_ctx(ctx),
|
||||
esr_el2);
|
||||
#endif /* CTX_INCLUDE_EL2_REGS */
|
||||
#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
|
||||
|
||||
cpu_info->ErrCtxEl3Reg[0] = read_ctx_reg(get_el3state_ctx(ctx),
|
||||
CTX_ELR_EL3);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue