Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-20 11:34:20 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

ARMv7 does not support STL instruction

Browse source 
Also need to add a SEV instruction in ARMv7 spin_unlock which
is implicit in ARMv8.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
This commit is contained in:
Etienne Carriere 2017-11-05 22:55:47 +01:00
parent 70896274ba
commit 0147bef523
2 changed files with 21 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
include/common/aarch32/asm_macros.S
View file

@ -79,6 +79,15 @@
ldr r0, =(\_name + \_size) ldr r0, =(\_name + \_size)
.endm .endm
#if (ARM_ARCH_MAJOR == 7)
/* ARMv7 does not support stl instruction */
.macro stl _reg, _write_lock
dmb
str \_reg, \_write_lock
dsb
.endm
#endif
/* /*
* Helper macro to generate the best mov/movw/movt combinations * Helper macro to generate the best mov/movw/movt combinations
* according to the value to be moved. * according to the value to be moved.

12
lib/locks/exclusive/aarch32/spinlock.S
View file

@ -9,6 +9,17 @@
.globl spin_lock .globl spin_lock
.globl spin_unlock .globl spin_unlock
#if ARM_ARCH_AT_LEAST(8, 0)
/*
* According to the ARMv8-A Architecture Reference Manual, "when the global
* monitor for a PE changes from Exclusive Access state to Open Access state,
* an event is generated.". This applies to both AArch32 and AArch64 modes of
* ARMv8-A. As a result, no explicit SEV with unlock is required.
*/
#define COND_SEV()
#else
#define COND_SEV() sev
#endif
func spin_lock func spin_lock
mov r2, #1 mov r2, #1
@ -27,5 +38,6 @@ endfunc spin_lock
func spin_unlock func spin_unlock
mov r1, #0 mov r1, #0
stl r1, [r0] stl r1, [r0]
COND_SEV()
bx lr bx lr
endfunc spin_unlock endfunc spin_unlock