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Use a board-specific board_sat_r_get() function to configure the board for PCIe 2.0 capability (e.g. 5GB/s link speed). Otherwise the default of 2.5GB/s will be established. Signed-off-by: Stefan Roese <sr@denx.de> |
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| .. | ||
| fpga.c | ||
| kwbimage.cfg | ||
| MAINTAINERS | ||
| Makefile | ||
| theadorable.c | ||
| theadorable.h | ||