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u-boot/drivers/ddr/marvell/a38x
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Chris Packham 247c80d6b8 mv_ddr: ddr3: only use active chip-selects when tuning ODT 
Inactive chip-selects will give invalid values for read_sample so don't
consider them when trying to determine the overall min/max read sample.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/18]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
..
ddr3_debug.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_init.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_init.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_logging_def.h
ddr3_patterns_64bit.h
ddr3_training.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_bist.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_centralization.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_db.c mv_ddr: ddr3: fix tRAS timimg parameter 2019-03-19 09:22:05 +01:00
ddr3_training_hw_algo.c mv_ddr: ddr3: only use active chip-selects when tuning ODT 2019-03-19 09:22:05 +01:00
ddr3_training_hw_algo.h
ddr3_training_ip.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_bist.h
ddr3_training_ip_centralization.h
ddr3_training_ip_db.h
ddr3_training_ip_def.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_engine.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_engine.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_flow.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_pbs.h
ddr3_training_ip_prv_if.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_leveling.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_leveling.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_pbs.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr_ml_wrapper.h
ddr_topology_def.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr_training_ip_db.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
dram_if.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
Makefile
mv_ddr_build_message.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_common.c
mv_ddr_common.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_plat.c ARM: mvebu: restore license information in mv_ddr_plat.{c,h} 2018-12-09 17:10:13 -05:00
mv_ddr_plat.h ARM: mvebu: restore license information in mv_ddr_plat.{c,h} 2018-12-09 17:10:13 -05:00
mv_ddr_regs.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_spd.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_spd.h
mv_ddr_sys_env_lib.c
mv_ddr_sys_env_lib.h
mv_ddr_topology.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_topology.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_training_db.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
seq_exec.h
xor.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
xor.h
xor_regs.h