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e99a6efa80
Pull the PHY GPIO reset code into separate function, since this is and will be reused multiple times. Set up default reset assert and deassert timing to generous 20ms and 1ms for maximum compatibility in case those DT properties are missing. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
69 lines
1.4 KiB
C
69 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Xilinx ethernet phy reset driver
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*
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* Copyright (C) 2022 Xilinx, Inc.
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*/
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#include <common.h>
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#include <dm/device_compat.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <phy.h>
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#include <linux/delay.h>
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#include <asm/gpio.h>
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struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
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int phyaddr)
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{
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struct phy_device *phydev;
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struct ofnode_phandle_args phandle_args;
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const char *node_name;
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struct udevice *pdev;
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u16 vendor, device;
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ofnode node;
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u32 id;
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int ret;
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if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
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&phandle_args))
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return NULL;
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if (!ofnode_valid(phandle_args.node))
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return NULL;
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node = phandle_args.node;
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ret = ofnode_read_eth_phy_id(node, &vendor, &device);
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if (ret) {
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debug("Failed to read eth PHY id, err: %d\n", ret);
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return NULL;
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}
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ret = phy_gpio_reset(dev);
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if (ret)
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return NULL;
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if (phyaddr == -1)
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phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1);
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id = vendor << 16 | device;
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phydev = phy_device_create(bus, phyaddr, id, false);
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if (phydev)
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phydev->node = node;
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if (IS_ENABLED(CONFIG_DM_ETH_PHY) && ofnode_valid(node)) {
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node_name = ofnode_get_name(node);
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ret = device_bind_driver_to_node(dev, "eth_phy_generic_drv",
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node_name, node,
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&pdev);
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if (ret)
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return NULL;
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ret = device_probe(pdev);
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if (ret)
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return NULL;
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}
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return phydev;
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}
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