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This patch is to enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
163 lines
2 KiB
Text
163 lines
2 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2024 Intel Corporation <www.intel.com>
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*/
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#include "socfpga_agilex5.dtsi"
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/ {
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model = "SoCFPGA Agilex5 SoCDK";
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aliases {
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serial0 = &uart0;
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ethernet0 = &gmac0;
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ethernet2 = &gmac2;
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};
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leds {
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compatible = "gpio-leds";
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hps0 {
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label = "hps_led0";
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gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
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};
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hps1 {
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label = "hps_led1";
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gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
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};
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hps2 {
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label = "hps_led2";
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gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
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};
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};
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memory {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0 0 0 0>;
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};
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soc {
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clocks {
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osc1 {
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clock-frequency = <25000000>;
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};
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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};
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&i3c0 {
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status = "okay";
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};
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&i3c1 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&usbphy0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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disable-over-current;
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};
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&watchdog0 {
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status = "okay";
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};
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&watchdog1 {
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status = "okay";
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};
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&watchdog2 {
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status = "okay";
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};
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&watchdog3 {
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status = "okay";
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};
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&watchdog4 {
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status = "okay";
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};
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&timer0 {
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status = "okay";
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};
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&timer1 {
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status = "okay";
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};
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&timer2 {
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status = "okay";
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};
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&timer3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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};
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&qspi {
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flash0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mt25qu02g";
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reg = <0>;
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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cdns,page-size = <256>;
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cdns,block-size = <16>;
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cdns,read-delay = <1>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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qspi_boot: partition@0 {
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label = "u-boot";
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reg = <0x0 0x04200000>;
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};
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root: partition@4200000 {
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label = "root";
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reg = <0x04200000 0x0BE00000>;
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};
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};
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};
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};
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