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AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU for the first stage bootloader execution, namely SPL. This patch implements the preliminary base to successfully run SPL on this RV32-based MCU to the console banner message. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
66 lines
1 KiB
ReStructuredText
66 lines
1 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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Board-specific doc
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==================
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.. toctree::
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:maxdepth: 2
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actions/index
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advantech/index
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andestech/index
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allwinner/index
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amlogic/index
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anbernic/index
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apple/index
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armltd/index
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aspeed/index
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asus/index
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atmel/index
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beacon/index
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beagle/index
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broadcom/index
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bsh/index
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cloos/index
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congatec/index
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coreboot/index
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emulation/index
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gateworks/index
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google/index
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highbank/index
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hisilicon/index
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htc/index
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intel/index
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kontron/index
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lenovo/index
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lg/index
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mediatek/index
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microchip/index
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microsoft/index
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nxp/index
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openpiton/index
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phytec/index
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purism/index
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qualcomm/index
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renesas/index
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rockchip/index
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samsung/index
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schneider/index
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sielaff/index
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siemens/index
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sifive/index
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sipeed/index
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socionext/index
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sophgo/index
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st/index
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starfive/index
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ste/index
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tbs/index
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thead/index
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theobroma-systems/index
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ti/index
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toradex/index
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variscite/index
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wexler/index
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xen/index
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xilinx/index
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