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5a77a0b039
This commit is to fix the system manager watchdog mode setting to support until mode_4 for Agilex5. This changes can refer to system manager register map on wddbg fields. In Agilex7 it is not detected as an issue because Agilex7 only have 4 watchdog until mode_3 and it is already been set correctly for it to halt on any CPU in debug mode. However, in Agilex5 this fix is needed in order to enable the watchdog pause feature for mode_4 when entering debug mode. If 0xF is not been set on mode_4, the Watchdog Timers will not halt on any CPU. As by default value, the pause signal does not assert when any CPU is in debug mode and the watchdog continue to count. Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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| .. | ||
| base_addr_a10.h | ||
| base_addr_ac5.h | ||
| base_addr_soc64.h | ||
| boot0.h | ||
| clock_manager.h | ||
| clock_manager_agilex.h | ||
| clock_manager_agilex5.h | ||
| clock_manager_arria10.h | ||
| clock_manager_gen5.h | ||
| clock_manager_n5x.h | ||
| clock_manager_s10.h | ||
| clock_manager_soc64.h | ||
| firewall.h | ||
| fpga_manager.h | ||
| fpga_manager_arria10.h | ||
| fpga_manager_gen5.h | ||
| freeze_controller.h | ||
| gpio.h | ||
| handoff_soc64.h | ||
| mailbox_s10.h | ||
| misc.h | ||
| nic301.h | ||
| pinmux.h | ||
| reset_manager.h | ||
| reset_manager_arria10.h | ||
| reset_manager_gen5.h | ||
| reset_manager_soc64.h | ||
| scan_manager.h | ||
| scu.h | ||
| sdram.h | ||
| sdram_arria10.h | ||
| sdram_gen5.h | ||
| secure_reg_helper.h | ||
| secure_vab.h | ||
| smc_api.h | ||
| system_manager.h | ||
| system_manager_arria10.h | ||
| system_manager_gen5.h | ||
| system_manager_soc64.h | ||
| timer.h | ||