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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
303 lines
5.9 KiB
C
303 lines
5.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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#include <post.h>
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extern int ocm_post_test (int flags);
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extern int cache_post_test (int flags);
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extern int watchdog_post_test (int flags);
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extern int i2c_post_test (int flags);
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extern int rtc_post_test (int flags);
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extern int memory_post_test (int flags);
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extern int cpu_post_test (int flags);
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extern int fpu_post_test (int flags);
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extern int uart_post_test (int flags);
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extern int ether_post_test (int flags);
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extern int spi_post_test (int flags);
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extern int usb_post_test (int flags);
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extern int spr_post_test (int flags);
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extern int sysmon_post_test (int flags);
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extern int dsp_post_test (int flags);
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extern int codec_post_test (int flags);
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extern int ecc_post_test (int flags);
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extern int flash_post_test(int flags);
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extern int dspic_init_post_test (int flags);
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extern int dspic_post_test (int flags);
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extern int gdc_post_test (int flags);
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extern int fpga_post_test (int flags);
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extern int lwmon5_watchdog_post_test(int flags);
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extern int sysmon1_post_test(int flags);
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extern int coprocessor_post_test(int flags);
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extern int led_post_test(int flags);
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extern int button_post_test(int flags);
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extern int memory_regions_post_test(int flags);
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extern int sysmon_init_f (void);
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extern void sysmon_reloc (void);
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struct post_test post_list[] =
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{
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#if CFG_POST & CFG_SYS_POST_OCM
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{
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"OCM test",
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"ocm",
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"This test checks on chip memory (OCM).",
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POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
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&ocm_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_OCM
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_CACHE
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{
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"Cache test",
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"cache",
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"This test verifies the CPU cache operation.",
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POST_RAM | POST_ALWAYS,
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&cache_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_CACHE
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_WATCHDOG
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#if defined(CFG_POST_WATCHDOG)
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CFG_POST_WATCHDOG,
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#else
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{
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"Watchdog timer test",
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"watchdog",
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"This test checks the watchdog timer.",
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POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
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&watchdog_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_WATCHDOG
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},
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#endif
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#endif
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#if CFG_POST & CFG_SYS_POST_I2C
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{
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"I2C test",
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"i2c",
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"This test verifies the I2C operation.",
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POST_RAM | POST_ALWAYS,
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&i2c_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_I2C
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_RTC
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{
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"RTC test",
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"rtc",
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"This test verifies the RTC operation.",
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POST_RAM | POST_SLOWTEST | POST_MANUAL,
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&rtc_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_RTC
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_MEMORY
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{
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"Memory test",
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"memory",
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"This test checks RAM.",
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POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
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&memory_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_MEMORY
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_CPU
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{
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"CPU test",
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"cpu",
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"This test verifies the arithmetic logic unit of"
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" CPU.",
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POST_RAM | POST_ALWAYS,
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&cpu_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_CPU
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_FPU
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{
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"FPU test",
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"fpu",
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"This test verifies the arithmetic logic unit of"
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" FPU.",
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POST_RAM | POST_ALWAYS,
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&fpu_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_FPU
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_UART
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#if defined(CFG_POST_UART)
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CFG_POST_UART,
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#else
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{
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"UART test",
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"uart",
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"This test verifies the UART operation.",
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POST_RAM | POST_SLOWTEST | POST_MANUAL,
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&uart_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_UART
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},
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#endif /* CFG_POST_UART */
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#endif
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#if CFG_POST & CFG_SYS_POST_ETHER
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{
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"ETHERNET test",
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"ethernet",
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"This test verifies the ETHERNET operation.",
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POST_RAM | POST_ALWAYS,
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ðer_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_ETHER
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_USB
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{
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"USB test",
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"usb",
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"This test verifies the USB operation.",
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POST_RAM | POST_ALWAYS,
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&usb_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_USB
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_SPR
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{
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"SPR test",
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"spr",
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"This test checks SPR contents.",
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POST_RAM | POST_ALWAYS,
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&spr_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_SPR
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_SYSMON
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{
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"SYSMON test",
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"sysmon",
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"This test monitors system hardware.",
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POST_RAM | POST_ALWAYS,
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&sysmon_post_test,
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&sysmon_init_f,
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&sysmon_reloc,
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CFG_SYS_POST_SYSMON
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_DSP
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{
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"DSP test",
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"dsp",
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"This test checks any connected DSP(s).",
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POST_RAM | POST_ALWAYS,
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&dsp_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_DSP
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_CODEC
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{
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"CODEC test",
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"codec",
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"This test checks any connected codec(s).",
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POST_RAM | POST_MANUAL,
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&codec_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_CODEC
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_ECC
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{
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"ECC test",
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"ecc",
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"This test checks the ECC facility of memory.",
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POST_ROM | POST_ALWAYS | POST_PREREL,
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&ecc_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_ECC
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_BSPEC1
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CFG_POST_BSPEC1,
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#endif
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#if CFG_POST & CFG_SYS_POST_BSPEC2
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CFG_POST_BSPEC2,
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#endif
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#if CFG_POST & CFG_SYS_POST_BSPEC3
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CFG_POST_BSPEC3,
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#endif
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#if CFG_POST & CFG_SYS_POST_BSPEC4
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CFG_POST_BSPEC4,
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#endif
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#if CFG_POST & CFG_SYS_POST_BSPEC5
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CFG_POST_BSPEC5,
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#endif
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#if CFG_POST & CFG_SYS_POST_COPROC
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{
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"Coprocessors communication test",
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"coproc_com",
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"This test checks communication with coprocessors.",
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POST_RAM | POST_ALWAYS | POST_CRITICAL,
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&coprocessor_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_COPROC
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_FLASH
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{
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"Parallel NOR flash test",
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"flash",
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"This test verifies parallel flash operations.",
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POST_RAM | POST_SLOWTEST | POST_MANUAL,
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&flash_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_FLASH
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},
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#endif
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#if CFG_POST & CFG_SYS_POST_MEM_REGIONS
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{
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"Memory regions test",
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"mem_regions",
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"This test checks regularly placed regions of the RAM.",
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POST_ROM | POST_SLOWTEST | POST_PREREL,
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&memory_regions_post_test,
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NULL,
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NULL,
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CFG_SYS_POST_MEM_REGIONS
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},
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#endif
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};
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unsigned int post_list_size = ARRAY_SIZE(post_list);
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