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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
155 lines
4 KiB
C
155 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Socfpga Reset Controller Driver
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*
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* Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
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*
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* based on
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* Allwinner SoCs Reset Controller driver
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*
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* Copyright 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <malloc.h>
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#include <dm/lists.h>
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#include <dm/of_access.h>
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#include <env.h>
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#include <reset-uclass.h>
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#include <wait_bit.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#define BANK_INCREMENT 4
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#define NR_BANKS 8
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struct socfpga_reset_data {
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void __iomem *modrst_base;
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};
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/*
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* For compatibility with Kernels that don't support peripheral reset, this
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* driver can keep the old behaviour of not asserting peripheral reset before
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* starting the OS and deasserting all peripheral resets (enabling all
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* peripherals).
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*
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* For that, the reset driver checks the environment variable
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* "socfpga_legacy_reset_compat". If this variable is '1', perihperals are not
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* reset again once taken out of reset and all peripherals in 'permodrst' are
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* taken out of reset before booting into the OS.
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* Note that this should be required for gen5 systems only that are running
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* Linux kernels without proper peripheral reset support for all drivers used.
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*/
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static bool socfpga_reset_keep_enabled(void)
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{
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#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(ENV_SUPPORT)
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const char *env_str;
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long val;
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env_str = env_get("socfpga_legacy_reset_compat");
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if (env_str) {
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val = simple_strtol(env_str, NULL, 0);
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if (val == 1)
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return true;
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}
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#endif
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return false;
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}
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static int socfpga_reset_assert(struct reset_ctl *reset_ctl)
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{
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struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev);
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int id = reset_ctl->id;
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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setbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
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return 0;
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}
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static int socfpga_reset_deassert(struct reset_ctl *reset_ctl)
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{
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struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev);
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int id = reset_ctl->id;
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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clrbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
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return wait_for_bit_le32(data->modrst_base + (bank * BANK_INCREMENT),
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BIT(offset),
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false, 500, false);
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}
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static const struct reset_ops socfpga_reset_ops = {
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.rst_assert = socfpga_reset_assert,
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.rst_deassert = socfpga_reset_deassert,
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};
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static int socfpga_reset_probe(struct udevice *dev)
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{
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struct socfpga_reset_data *data = dev_get_priv(dev);
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u32 modrst_offset;
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void __iomem *membase;
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membase = dev_read_addr_ptr(dev);
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modrst_offset = dev_read_u32_default(dev, "altr,modrst-offset", 0x10);
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data->modrst_base = membase + modrst_offset;
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return 0;
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}
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static int socfpga_reset_remove(struct udevice *dev)
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{
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struct socfpga_reset_data *data = dev_get_priv(dev);
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if (socfpga_reset_keep_enabled()) {
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puts("Deasserting all peripheral resets\n");
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writel(0, data->modrst_base + 4);
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}
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return 0;
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}
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static int socfpga_reset_bind(struct udevice *dev)
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{
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int ret;
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struct udevice *sys_child;
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/*
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* The sysreset driver does not have a device node, so bind it here.
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* Bind it to the node, too, so that it can get its base address.
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*/
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ret = device_bind_driver_to_node(dev, "socfpga_sysreset", "sysreset",
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dev_ofnode(dev), &sys_child);
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if (ret)
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debug("Warning: No sysreset driver: ret=%d\n", ret);
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return 0;
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}
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static const struct udevice_id socfpga_reset_match[] = {
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{ .compatible = "altr,rst-mgr" },
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{ /* sentinel */ },
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};
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U_BOOT_DRIVER(socfpga_reset) = {
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.name = "socfpga-reset",
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.id = UCLASS_RESET,
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.of_match = socfpga_reset_match,
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.bind = socfpga_reset_bind,
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.probe = socfpga_reset_probe,
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.priv_auto = sizeof(struct socfpga_reset_data),
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.ops = &socfpga_reset_ops,
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.remove = socfpga_reset_remove,
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.flags = DM_FLAG_OS_PREPARE,
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};
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