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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2007
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* Sascha Hauer, Pengutronix
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/io.h>
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#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
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/* General purpose timers registers */
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#define GPTCR __REG(TIMER_BASE) /* Control register */
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#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
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#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
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#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
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/* General purpose timers bitfields */
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#define GPTCR_SWR (1 << 15) /* Software reset */
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#define GPTCR_FRR (1 << 9) /* Freerun / restart */
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#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
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#define GPTCR_TEN 1 /* Timer enable */
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/* The 32768Hz 32-bit timer overruns in 131072 seconds */
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int timer_init(void)
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{
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int i;
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/* setup GP Timer 1 */
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GPTCR = GPTCR_SWR;
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for (i = 0; i < 100; i++)
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GPTCR = 0; /* We have no udelay by now */
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GPTPR = 0; /* 32Khz */
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/* Freerun Mode, PERCLK1 input */
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GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
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return 0;
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}
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unsigned long timer_read_counter(void)
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{
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return GPTCNT;
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}
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