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In xSPI mode, flashes expect 2-byte opcodes. The second byte is called the "command extension". There can be 3 types of extensions in xSPI: repeat, invert, and hex. When the extension type is "repeat", the same opcode is sent twice. When it is "invert", the second byte is the inverse of the opcode. When it is "hex" an additional opcode byte based is sent with the command whose value can be anything. So, make opcode a 16-bit value and add a 'nbytes', similar to how multiple address widths are handled. All usages of sizeof(op->cmd.opcode) also need to be changed to be op->cmd.nbytes because that is the actual indicator of opcode size. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
107 lines
2.3 KiB
C
107 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#include <log.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi-mem.h>
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int spi_mem_exec_op(struct spi_slave *slave,
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const struct spi_mem_op *op)
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{
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unsigned int pos = 0;
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const u8 *tx_buf = NULL;
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u8 *rx_buf = NULL;
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u8 *op_buf;
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int op_len;
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u32 flag;
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int ret;
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int i;
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if (op->data.nbytes) {
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if (op->data.dir == SPI_MEM_DATA_IN)
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rx_buf = op->data.buf.in;
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else
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tx_buf = op->data.buf.out;
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}
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op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
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op_buf = calloc(1, op_len);
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ret = spi_claim_bus(slave);
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if (ret < 0)
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return ret;
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op_buf[pos++] = op->cmd.opcode;
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if (op->addr.nbytes) {
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for (i = 0; i < op->addr.nbytes; i++)
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op_buf[pos + i] = op->addr.val >>
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(8 * (op->addr.nbytes - i - 1));
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pos += op->addr.nbytes;
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}
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if (op->dummy.nbytes)
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memset(op_buf + pos, 0xff, op->dummy.nbytes);
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/* 1st transfer: opcode + address + dummy cycles */
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flag = SPI_XFER_BEGIN;
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/* Make sure to set END bit if no tx or rx data messages follow */
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if (!tx_buf && !rx_buf)
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flag |= SPI_XFER_END;
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ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
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if (ret)
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return ret;
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/* 2nd transfer: rx or tx data path */
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if (tx_buf || rx_buf) {
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ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
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rx_buf, SPI_XFER_END);
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if (ret)
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return ret;
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}
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spi_release_bus(slave);
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for (i = 0; i < pos; i++)
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debug("%02x ", op_buf[i]);
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debug("| [%dB %s] ",
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tx_buf || rx_buf ? op->data.nbytes : 0,
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tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
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for (i = 0; i < op->data.nbytes; i++)
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debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
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debug("[ret %d]\n", ret);
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free(op_buf);
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if (ret < 0)
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return ret;
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return 0;
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}
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int spi_mem_adjust_op_size(struct spi_slave *slave,
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struct spi_mem_op *op)
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{
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unsigned int len;
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len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
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if (slave->max_write_size && len > slave->max_write_size)
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return -EINVAL;
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if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size)
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op->data.nbytes = min(op->data.nbytes,
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slave->max_read_size);
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else if (slave->max_write_size)
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op->data.nbytes = min(op->data.nbytes,
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slave->max_write_size - len);
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if (!op->data.nbytes)
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return -EINVAL;
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return 0;
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}
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