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ce30e3ff1e
This is defined based on two other CONFIGs for all boards except sandbox and durian. For sandbox the value does not matter. For durian the value seems excessive. Drop the option completely, to simplify configuration and reduce the number of things we need to convert to Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
149 lines
5.1 KiB
C
149 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2019 NXP
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*/
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#ifndef __LS1028A_RDB_H
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#define __LS1028A_RDB_H
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#include "ls1028a_common.h"
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#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
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#define CONFIG_SYS_RTC_BUS_NUM 0
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/* Store environment at top of flash */
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#define CONFIG_DIMM_SLOTS_PER_CTLR 1
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_QIXIS_I2C_ACCESS
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/*
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* QIXIS Definitions
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*/
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#define CONFIG_FSL_QIXIS
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#ifdef CONFIG_FSL_QIXIS
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#define QIXIS_BASE 0x7fb00000
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#define QIXIS_BASE_PHYS QIXIS_BASE
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#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
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#define QIXIS_LBMAP_SWITCH 2
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#define QIXIS_LBMAP_MASK 0xe0
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#define QIXIS_LBMAP_SHIFT 0x5
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#define QIXIS_LBMAP_DFLTBANK 0x00
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#define QIXIS_LBMAP_ALTBANK 0x00
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#define QIXIS_LBMAP_SD 0x00
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#define QIXIS_LBMAP_EMMC 0x00
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#define QIXIS_LBMAP_XSPI 0x00
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#define QIXIS_RCW_SRC_SD 0xf8
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#define QIXIS_RCW_SRC_EMMC 0xf9
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#define QIXIS_RCW_SRC_XSPI 0xff
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#define QIXIS_RST_CTL_RESET 0x31
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#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10
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#define QIXIS_RCFG_CTL_RECONFIG_START 0x11
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#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
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#define QIXIS_RST_FORCE_MEM 0x01
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#define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
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#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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CSPR_PORT_SIZE_8 | \
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CSPR_MSEL_GPCM | \
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CSPR_V)
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#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
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CSOR_NOR_NOR_MODE_AVD_NOR | \
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CSOR_NOR_TRHZ_80)
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#endif
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/* SATA */
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define SCSI_VEND_ID 0x1b4b
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#define SCSI_DEV_ID 0x9170
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#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
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/* Initial environment variables */
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#ifndef SPL_NO_ENV
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"board=ls1028ardb\0" \
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"hwconfig=fsl_ddr:bank_intlv=auto\0" \
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"ramdisk_addr=0x800000\0" \
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"ramdisk_size=0x2000000\0" \
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"bootm_size=0x10000000\0" \
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"fdt_addr=0x00f00000\0" \
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"kernel_addr=0x01000000\0" \
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"scriptaddr=0x80000000\0" \
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"scripthdraddr=0x80080000\0" \
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"fdtheader_addr_r=0x80100000\0" \
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"kernelheader_addr_r=0x80200000\0" \
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"load_addr=0xa0000000\0" \
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"kernel_addr_r=0x81000000\0" \
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"fdt_addr_r=0x90000000\0" \
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"ramdisk_addr_r=0xa0000000\0" \
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"kernel_start=0x1000000\0" \
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"kernelheader_start=0x600000\0" \
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"kernel_load=0xa0000000\0" \
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"kernel_size=0x2800000\0" \
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"kernelheader_size=0x40000\0" \
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"kernel_addr_sd=0x8000\0" \
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"kernel_size_sd=0x14000\0" \
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"kernelhdr_addr_sd=0x3000\0" \
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"kernelhdr_size_sd=0x20\0" \
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"console=ttyS0,115200\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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BOOTENV \
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"boot_scripts=ls1028ardb_boot.scr\0" \
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"boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
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"scan_dev_for_boot_part=" \
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"part list ${devtype} ${devnum} devplist; " \
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"env exists devplist || setenv devplist 1; " \
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"for distro_bootpart in ${devplist}; do " \
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"if fstype ${devtype} " \
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"${devnum}:${distro_bootpart} " \
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"bootfstype; then " \
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"run scan_dev_for_boot; " \
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"fi; " \
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"done\0" \
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"boot_a_script=" \
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"load ${devtype} ${devnum}:${distro_bootpart} " \
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"${scriptaddr} ${prefix}${script}; " \
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"env exists secureboot && load ${devtype} " \
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"${devnum}:${distro_bootpart} " \
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"${scripthdraddr} ${prefix}${boot_script_hdr} " \
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"&& esbc_validate ${scripthdraddr};" \
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"source ${scriptaddr}\0" \
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"xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
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"sf probe 0:0 && sf read $load_addr " \
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"$kernel_start $kernel_size ; env exists secureboot &&" \
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"sf read $kernelheader_addr_r $kernelheader_start " \
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"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
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" bootm $load_addr#$board\0" \
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"xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
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"sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
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"&& hdp load $load_addr 0x2000\0" \
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"sd_bootcmd=echo Trying load from SD ...;" \
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"mmc dev 0;mmcinfo; mmc read $load_addr " \
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"$kernel_addr_sd $kernel_size_sd && " \
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"env exists secureboot && mmc read $kernelheader_addr_r " \
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"$kernelhdr_addr_sd $kernelhdr_size_sd " \
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" && esbc_validate ${kernelheader_addr_r};" \
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"bootm $load_addr#$board\0" \
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"sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
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"mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
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"&& hdp load $load_addr 0x2000\0" \
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"emmc_bootcmd=echo Trying load from EMMC ..;" \
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"mmc dev 1;mmcinfo; mmc read $load_addr " \
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"$kernel_addr_sd $kernel_size_sd && " \
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"env exists secureboot && mmc read $kernelheader_addr_r " \
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"$kernelhdr_addr_sd $kernelhdr_size_sd " \
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" && esbc_validate ${kernelheader_addr_r};" \
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"bootm $load_addr#$board\0" \
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"emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
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"mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
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"&& hdp load $load_addr 0x2000\0"
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#endif
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#endif /* __LS1028A_RDB_H */
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