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ce30e3ff1e
This is defined based on two other CONFIGs for all boards except sandbox and durian. For sandbox the value does not matter. For durian the value seems excessive. Drop the option completely, to simplify configuration and reduce the number of things we need to convert to Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
129 lines
3.5 KiB
C
129 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Stefan Roese <sr@denx.de>
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* Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
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*/
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#ifndef _CONFIG_CONTROLCENTERDC_H
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#define _CONFIG_CONTROLCENTERDC_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_CUSTOMER_BOARD_SUPPORT
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/*
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* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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/*
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* SATA/SCSI/AHCI configuration
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*/
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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/* Environment in SPI NOR flash */
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#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
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/* PCIe support */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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/*
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* Software (bit-bang) MII driver configuration
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*/
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#define CONFIG_BITBANGMII_MULTI
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/* SPL */
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/*
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* Select the boot device here
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*
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* Currently supported are:
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* SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
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* SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
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*/
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#define SPL_BOOT_SPI_NOR_FLASH 1
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#define SPL_BOOT_SDIO_MMC_CARD 2
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#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
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/* Defines for SPL */
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#define CONFIG_SPL_SIZE (160 << 10)
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#if defined(CONFIG_SECURED_MODE_IMAGE)
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#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
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#else
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#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
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#endif
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_MALLOC_SIMPLE
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#endif
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#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
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/* SPL related MMC defines */
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
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#endif
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#endif
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/*
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* Environment Configuration
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*/
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#define CONFIG_HOSTNAME "ccdc"
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#define CONFIG_ROOTPATH "/opt/nfsroot"
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#define CONFIG_BOOTFILE "ccdc.img"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth1\0" \
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"consoledev=ttyS1\0" \
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"u-boot=u-boot.bin\0" \
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"bootfile_addr=1000000\0" \
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"keyprogram_addr=3000000\0" \
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"keyprogram_file=keyprogram.img\0" \
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"fdtfile=controlcenterdc.dtb\0" \
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"load=tftpboot ${loadaddr} ${u-boot}\0" \
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"mmcdev=0:2\0" \
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"update=sf probe 1:0;" \
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" sf erase 0 +${filesize};" \
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" sf write ${fileaddr} 0 ${filesize}\0" \
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"upd=run load update\0" \
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"fdt_high=0x10000000\0" \
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"initrd_high=0x10000000\0" \
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"loadkeyprogram=tpm flush_keys;" \
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" mmc rescan;" \
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" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
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" source ${keyprogram_addr}:script@1\0" \
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"gpio1=gpio@22_25\0" \
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"gpio2=A29\0" \
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"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
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"2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
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"bootfail=for i in ${blinkseq}; do" \
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" if test $i -eq 0; then" \
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" gpio clear ${gpio1}; gpio set ${gpio2};" \
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" elif test $i -eq 1; then" \
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" gpio clear ${gpio1}; gpio clear ${gpio2};" \
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" elif test $i -eq 2; then" \
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" gpio set ${gpio1}; gpio set ${gpio2};" \
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" else;" \
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" gpio clear ${gpio1}; gpio set ${gpio2};" \
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" fi; sleep 0.12; done\0"
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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*/
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#include "mv-common.h"
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#endif /* _CONFIG_CONTROLCENTERDC_H */
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