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e12337915c
The header file is not necessary in either of those files, remove it as common.h is going away. Include missing asm/arch/rmobile.h in board/renesas/rcar-common/v3-common.c to prevent build failure of r8a77970_eagle r8a779a0_falcon r8a77980_v3hsk and r8a77970_v3msk . Include missing asm/u-boot.h in falcon.c and grpeach.c to fix build failure due to missing definition of struct bd_info . Include errno.h in grpeach.c to fix build error due to missing definition of EINVAL. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
53 lines
998 B
C
53 lines
998 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2007,2008
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*/
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#include <ide.h>
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#include <init.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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int checkboard(void)
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{
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puts("BOARD: Renesas Solutions R2D Plus\n");
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return 0;
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}
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int board_init(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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return 0;
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}
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#define FPGA_BASE 0xA4000000
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#define FPGA_CFCTL (FPGA_BASE + 0x04)
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#define CFCTL_EN (0x432)
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#define FPGA_CFPOW (FPGA_BASE + 0x06)
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#define CFPOW_ON (0x02)
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#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
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#define CFCDINTCLR_EN (0x01)
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void ide_set_reset(int idereset)
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{
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/* if reset = 1 IDE reset will be asserted */
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if (idereset) {
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outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
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outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
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outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
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}
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}
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#ifndef CONFIG_DM_ETH
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int board_eth_init(struct bd_info *bis)
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{
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return pci_eth_init(bis);
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}
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#endif
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